參數(shù)資料
型號(hào)： AD9854/PCBZ
廠商： Analog Devices Inc
文件頁數(shù)： 36/52頁
文件大小： 0K
描述： BOARD EVAL FOR AD9854
產(chǎn)品培訓(xùn)模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設(shè)計(jì)資源： AD9854 Eval Brd Schematic
AD9854 Eval Brd BOM
標(biāo)準(zhǔn)包裝： 1
系列： AgileRF™
主要目的： 計(jì)時(shí)，直接數(shù)字合成（DDS）
已用 IC / 零件： AD9854
已供物品： 板
相關(guān)產(chǎn)品： AD9854ASTZ-ND - IC DDS QUADRATURE CMOS 80-LQFP
AD9854
Rev. E | Page 41 of 52
multipliers, the inverse sinc filter, the Q DAC, and the on-board
comparator are disabled.
FREQUENCY (MHz)
1400
20
S
UP
P
LY
CU
RRE
N
T
(m
A
)
1200
1000
800
600
400
200
0
60
100
140
180
220
260
300
ALL CIRCUITS ENABLED
BASIC CONFIGURATION
00
63
6-
0
62
NOTES
THIS GRAPH ASSUMES THAT THE AD9854 DEVICE IS SOLDERED
TO A MULTILAYER PCB PER THE RECOMMENDED BEST
MANUFACTURING PRACTICES AND PROCEDURES FOR THE
GIVEN PACKAGE TYPE.
Figure 62. Current Consumption vs. Clock Frequency
Figure 63 shows the approximate current consumed by each of
four functions.
FREQUENCY (MHz)
20
60
100
140
180
220
260
300
450
S
UP
P
LY
CURRE
N
T
(
m
A)
400
350
300
250
200
150
0
100
50
Q DAC
500
INVERSE SINC FILTER
OUTPUT SCALING
MULTIPLIERS
COMPARATOR
0063
6-
06
3
NOTES
THIS GRAPH ASSUMES THAT THE AD9854 DEVICE IS
SOLDERED TO A MULTILAYER PCB PER THE RECOMMENDED
BEST MANUFACTURING PRACTICES AND PROCEDURES FOR
THE GIVEN PACKAGE TYPE.
Figure 63. Current Consumption by Function vs. Clock Frequency
EVALUATION OF OPERATING CONDITIONS
The first step in applying the AD9854 is to select the internal
clock frequency. Clock frequency selections greater than
200 MHz require the use of the thermally enhanced package
(AD9854ASVZ); other clock frequencies may allow the use of the
standard plastic surface-mount package, but more information is
needed to make that determination.
The second evaluation step is to determine the maximum
required operating temperature for the AD9854 in a given
application. Subtract this value from 150°C, which is the
maximum junction temperature allowed for the AD9854. For
the extended industrial temperature range, the maximum
operating temperature is 85°C, which results in a difference of
65°C. This is the maximum temperature gradient that the
device can experience due to power dissipation.
The third evaluation step is to divide the maximum temper-
ature gradient by the thermal impedance to determine the
maximum power dissipation allowed for the application.
For example, 65°C divided by the thermal impedance of the
package being used yields the total power dissipation limit (4.06
W for the ASVZ models and 1.71 W for the ASTZ models).
Therefore, for a 3.3 V nominal power supply voltage, the
current consumed by the device with full operating conditions
must not exceed 515 mA for the standard plastic package and
1242 mA for the thermally enhanced package. The total set of
enabled functions and operating conditions of the AD9854
application must support these current consumption limits.
To determine the suitability of a given AD9854 application
in terms of the power dissipation requirements use Figure 62
and Figure 63. These graphs assume that the AD9854 device is
soldered to a multilayer PCB per the recommended best
manufacturing practices and procedures for the given package
type. This ensures that the specified thermal impedance
specifications are achieved.
THERMALLY ENHANCED PACKAGE
MOUNTING GUIDELINES
Refer to the AN-772 Application Note for details on mounting
devices with an exposed paddle.
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