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| 型號： | AD9600ABCPZ-150 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 43/72頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 150MSPS 64LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 150M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 890mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 4 個單端，單極；2 個差分，單極 |
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AD9600
Rev. B | Page 48 of 72
EVALUATION BOARD
The AD9600 evaluation board provides all of the support
circuitry required to operate the ADC in its various modes and
configurations. The converter can be driven differentially using the
double-balun configuration (default) or an AD8352 differential
driver. The ADC can also be driven in a single-ended fashion.
Separate power pins are provided to isolate the DUT from the
AD8352 drive circuitry. Each input configuration can be selected
by properly connecting various components (see Figure 74 to
Figure 83). Figure 73 shows the typical bench characterization
setup used to evaluate the ac performance of the AD9600.
It is critical that the signal sources used for the analog input and
clock have very low phase noise (<<1 ps rms jitter) to realize the
optimum performance of the converter. Proper filtering of the
analog input signal to remove harmonics and lower the integrated
or broadband noise at the input is also necessary to achieve the
specified noise performance.
layout diagrams that demonstrate the routing and grounding
techniques that should be applied at the system level.
POWER SUPPLIES
The evaluation board comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. Connect
the supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz
to 63 Hz. The output of the supply is a 2.1 mm inner diameter
circular jack that connects to the PCB at J16. Once on the PC
board, the 6 V supply is fused and conditioned before connecting
to six low dropout linear regulators that supply the proper bias
to each of the various sections of the board.
The evaluation board can be operated using external supplies
by removing L1, L3, L4, and L13 to disconnect the voltage
regulators supplied from the switching power supply. This
enables the user to individually bias each section of the board.
Use P3 and P4 to connect a different supply for each section.
At least one 1.8 V supply is needed with a 1 A current capability
for AVDD and DVDD; a separate 1.8 V to 3.3 V supply is
recommended for DRVDD. To operate the evaluation board
using the AD8352 driver, a separate 5.0 V supply (AMP VDD)
with a 1 A current capability is needed. To operate the evaluation
board using the alternative SPI options, a separate 3.3 V analog
supply (VS) is needed in addition to the other supplies. The
3.3 V supply (VS) should also have a 1 A current capability.
Using Solder Jumper SJ35 allows the user to separate AVDD
and DVDD if desired.
INPUT SIGNALS
When connecting the clock and analog sources to the evaluation
board, use clean signal generators with low phase noise, such as
Rohde & Schwarz SMA100A or Agilent HP8644 signal generators
or the equivalent, as well as a 1 m, shielded, RG-58, 50 Ω coaxial
cable. Enter the desired frequency and amplitude for the ADC.
The AD9600 evaluation board from Analog Devices can accept
a ~2.8 V p-p or a 13 dBm sine wave input for the clock. When
connecting the analog input source, it is recommended to use a
multipole, narrow-band, band-pass filter with 50 Ω terminations.
Good choices of such band-pass filters are available from TTE,
Allen Avionics, and K&L Microwave, Inc. Connect the filter
directly to the evaluation board, if possible.
OUTPUT SIGNALS
The parallel CMOS outputs interface directly with the Analog
Devices standard ADC data capture board (HSC-ADC-
EVALCZ). For more information on the ADC data capture
boards and their optional settings, visit www.analog.com/FIFO.
USB
CONNECTION
AD9600
EVALUATION BOARD
10-BIT
PARALLEL
CMOS
10-BIT
PARALLEL
CMOS
HSC-ADC-EVALCZ
FPGA BASED
DATA
CAPTURE BOARD
PC RUNNING
VISUAL ANALOG
AND SPI
CONTROLLER
SOFTWARE
1.8V
–+
A
V
DD
I
N
VS
DRV
DD
I
N
GN
D
GN
D
–+
5.0V
GN
D
A
M
P
VD
D
3.3V
6V DC
2A MAX
WALL OUTLET
100V AC TO 240V AC
47Hz TO 63Hz
SWITCHING
POWER
SUPPLY
–+
GN
D
3.3V
VC
P
–+
GN
D
3.3V
SPI
06
909
-30
0
ROHDE & SCHWARZ,
SMA100A,
2V p-p SIGNAL
SYNTHESIZER
CLK
ROHDE & SCHWARZ,
SMA100A,
2V p-p SIGNAL
SYNTHESIZER
AINB
BAND-PASS
FILTER
ROHDE & SCHWARZ,
SMA100A,
2V p-p SIGNAL
SYNTHESIZER
AINA
BAND-PASS
FILTER
Figure 73. Evaluation Board Connection
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