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參數(shù)資料
| 型號(hào)： | AD7112 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| 中文描述： | LC2MOS LOGDAC雙對(duì)數(shù)D / A轉(zhuǎn)換 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 230K |
| 代理商： | AD7112 |
AD7112
REV. 0
–7–
Another error arises from the output amplifier’s input offset volt-
age. T he amplifier is operated with a fixed feedback resistance,
but the equivalent source impedance (the AD7112 output im-
pedance) varies as a function of the attenuation level. T his has
the effect of varying the noise gain of the amplifier thus creating
a varying error due to amplifier offset voltage. It is recom-
mended that an amplifier with less than 50
μ
V of input offset be
used (such as the AD712 or ADOP07) in dc applications. Am-
plifiers with a large input offset voltage may cause audible
thumps in audio applications due to dc output changes. T he
AD7112 accuracy is specified and tested using only the internal
feedback resistor. Any gain error (i.e., mismatch of R
FB
to the
R–2R ladder) that may exist in the AD7112 D/A converter cir-
cuit results in a constant attenuation error over the whole range.
T he AD7112 accuracy is specified relative to 0 dB attenuation,
hence gain trim resistors can be used to adjust V
OUT
= V
IN
pre-
cisely (i.e., 0 dB attenuation) with input code 00000000. For
further information on gain error refer to the “CMOS DAC Ap-
plication Guide” which is available from Analog Devices, Publi-
cation Number G872b-8-1/89.
TYPICAL PERFORMANCE CHARACTERISTICS
I
D
–
6
0
5
3
1
2
0
5
4
3
4
2
1
V
IN
– Volts
T
A
= +25
°
C
ALL DIGITAL INPUTS
TIED TOGETHER
Figure 6. Supply Current vs. Logic Input Level
FREQUENCY – Hz
N
OP275
C1 = 0pF
10
–30
10
4
10
7
0
–20
10
5
–10
OP275
C1 = 15pF
AD712
C1 = 0pF
AD712
C1 = 15pF
10
6
V
DD
= +5V
T
= +25
°
C
DATA INPUT CODE = 0000 0000
V
IN
= 1V rms
Figure 7. Frequency Response with AD712 and OP275
10
90
100
0%
200ns
5V
C1 = 0pF
C1 = 15pF
DATA CHANGE
FROM 00H TO 80H
5V
A1 0.8V
Figure 4. Response of AD7112 with AD712
10
90
100
0%
200ns
5V
C1 = 0pF
C1 = 15pF
DATA CHANGE
FROM 00H TO 80H
5V
A1 0.8V
Figure 5. Response of AD7112 with OP275
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7112BN | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| AD7112BR | LC2MOS LOGDAC Dual Logarithmic D/A Converter |
| AD7112CN | LC2MOS LOGDAC Dual Logarithmic D/A Converter |
| AD7112CR | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| AD7112* | LC2MOS LOGDAC Dual Logarithmic D/A Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD71124JCFZ | 制造商:Analog Devices 功能描述:IC |
| AD7112BN | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 17-bit 20-Pin PDIP N Tube 制造商:Analog Devices 功能描述:IC 17BIT DAC DUAL LOG 7112 DIP20 |
| AD7112BNZ | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 17-bit 20-Pin PDIP N Tube |
| AD7112BR | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 17-bit 20-Pin SOIC W |
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