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參數(shù)資料
| 型號： | AD7112 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| 中文描述： | LC2MOS LOGDAC雙對數(shù)D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 230K |
| 代理商： | AD7112 |
AD7112
REV. 0
–3–
TIMNGSPECIFICATIONS
1
Parameter
T
A
= +25
8
C
T
A
= –40
8
C to +85
8
C
Units
Conditions/Comments
CS
to
WR
Setup T ime
CS
to
WR
Hold T ime
DAC Select to
WR
Setup T ime
DAC Select to
WR
Hold T ime
Data Valid to
WR
Setup T ime
Data Valid to
WR
Hold T ime
WR
Pulse Width
t
CS
t
CH
t
AS
t
AH
t
DS
t
DH
t
WR
0
0
4
0
55
10
53
0
0
4
0
55
10
53
ns min
ns min
ns min
ns min
ns min
ns min
ns min
See Figure 3.
NOT ES
1
T iming specifications guaranteed by design not production tested. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage
level of 1.6 V.
Specifications subject to change without notice.
AC PERFORMANCE CHARACTERISTICS
1
T
A
=
–40
8
C to
+85
8
C
T
A
=
+25
8
C
Parameter
Units
Conditions/Comments
DC Supply Rejection
Gain/
V
DD
Digital-to-Analog Glitch Impulse
0.001
10
0.005
10
dB/% max
nV s typ
V
DD
=
±
5%. Input Code = 00000000
Measured with AD843 as output amplifier for input
code transition 10000000 to 00000000.
Output Capacitance, C
OUT A
, C
OUT B
AC Feedthrough
V
IN
A to OUT A
50
50
pF max
–94
–90
dB max
V
IN
A, V
IN
B = 6 V rms at 1 kHz. DAC
Registers loaded with all 1s.
V
IN
B to OUT B
Channel-to-Channel Isolation
V
IN
A to OUT B
–94
–90
dB max
–87
–87
dB typ
V
IN
A = 6 V rms at 10 kHz sine wave,
V
IN
B = 0 V. DAC Registers loaded with all 0s.
V
IN
B = 6 V rms at 10 kHz sine wave,
V
IN
A = 0 V. DAC Registers loaded with all 0s.
Measured with input code transitions of all 0s to all 1s.
V
IN
B to OUT A
–87
–87
dB typ
Digital Feedthrough
Output Noise Voltage Density
(30 Hz to 50 kHz)
1
1
nV s typ
15
15
nV/
√
Hz
typ
Measured between R
FB
A and OUT A or between
R
FB
B and OUT B.
V
IN
A = V
IN
B = 6 V rms at 1 kHz. DAC
Registers loaded with all 0s.
T otal Harmonic Distortion
–91
–91
dB typ
NOT ES
1
Guaranteed by design, not production tested.
Specifications subject to change without notice.
(V
DD
= +5 V
6
5%; 0UT A = OUT B = AGND = DGND = OV; V
IN
A = V
IN
B = 10 V)
(V
DD
= +5 V
6
5%; 0UT A = OUT B = AGND = DGND = 0 V; V
IN
A =
V
IN
B = 10 V. Output amplifier AD712 except where noted.)
相關PDF資料 |
PDF描述 |
|---|---|
| AD7112BN | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| AD7112BR | LC2MOS LOGDAC Dual Logarithmic D/A Converter |
| AD7112CN | LC2MOS LOGDAC Dual Logarithmic D/A Converter |
| AD7112CR | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| AD7112* | LC2MOS LOGDAC Dual Logarithmic D/A Converter |
相關代理商/技術參數(shù) |
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|---|---|
| AD71124JCFZ | 制造商:Analog Devices 功能描述:IC |
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| AD7112BNZ | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 17-bit 20-Pin PDIP N Tube |
| AD7112BR | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 17-bit 20-Pin SOIC W |
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