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參數(shù)資料
| 型號： | AD6624A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) |
| 中文描述： | 四通道，100 MSPS的數(shù)字接收信號處理器（RSP） |
| 文件頁數(shù)： | 27/40頁 |
| 文件大?。?/td> | 636K |
| 代理商： | AD6624A |
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REV. 0
AD6624A
–27–
Table VIII. Channel Address Memory Map
Ch Address
Register
Bit Width
Comments
128
×
20-Bit Memory
0:
SLEEP Bit from EXT_ADDRESS 3
1:
Hop
0:
Start
2:
First SYNC Only
1:
Hop_En
0:
Start_En
Start Hold-Off Value
NCO_FREQ Hold-Off Value
NCO_FREQ[15:0]
NCO_FREQ[31:16]
NCO_PHASE[15:0]
8
–
7:
SYNC Input Select[1:0]
6:
WB Input Select B/A
5
–
4:
Input Enable Control
11:
Clock On IEN Transition to Low
10:
Clock On IEN Transition to High
01:
Clock On IEN High
00:
Mask On IEN Low
3:
Clear Phase Accumulator On HOP
2:
Amplitude Dither
1:
Phase Dither
0:
Bypass (A-Input -> I-Path, B -> Q)
00
–
7F
80
81
Coefficient Memory (CMEM)
CHANNEL SLEEP
Soft_Sync Control Register
20
1
2
82
Pin_SYNC Control Register
3
83
84
85
86
87
88
Start Hold-Off Counter
NCO Frequency Hold-Off Counter
NCO Frequency Register 0
NCO Frequency Register 1
NCO Phase Offset Register
NCO Control Register
16
16
16
16
16
9
89
–
8F
90
91
92
Unused
rCIC2 Decimation
–
1
rCIC2 Interpolation
–
1
rCIC2 Scale
12
9
12
M
rCIC2
–
1
L
rCIC2
–
1
11:
10:
9
–
5:
4
–
0:
Reserved (Must Be Written Low)
M
CIC5
–
1
4
–
0:
CIC5_SCALE[4:0]
Reserved (Must Be Written Low)
Exponent Invert
Exponent Weight
rCIC2_QUIET[4:0]
rCIC2_LOUD[4:0]
93
94
95
96
97
–
9F
A0
A1
A2
A3
A4
Reserved
CIC5 Decimation
–
1
CIC5 Scale
Reserved
Unused
RCF Decimation
–
1
RCF Decimation Phase
RCF Number of Taps
–
1
RCF Coefficient Offset
RCF Control Register
8
8
5
8
8
8
8
8
11
M
RCF
–
1
P
RCF
N
TAPS
–
1
CO
RCF
10:
9:
8:
7:
6:
5
–
4:
RCF Bypass BIST
RCF Input Select (Own 0, Other 1)
Program RAM Bank 1/0
Use Common Exponent
Force Output Scale
Output Format
1x:
Floating Point 12 + 4
01:
Floating Point 8 + 4
00:
Fixed Point
3
–
0: Output Scale
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| AD6624S/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP) |
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