- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373890 > AD6624AABC (ANALOG DEVICES INC) Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) PDF資料下載
參數(shù)資料
| 型號： | AD6624AABC |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA196 |
| 封裝： | PLASTIC, BGA-196 |
| 文件頁數(shù)： | 1/40頁 |
| 文件大?。?/td> | 636K |
| 代理商： | AD6624AABC |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
Tel: 781/329-4700Fax: 781/326-8703
Analog Devices, Inc., 2002AD6624A
The AD6624A is part of Analog Devices’ SoftCell
multicarrier
transceiver chipset designed for compatibility with Analog
Devices’ family of high sample rate IF sampling ADCs (AD6640/
AD6644 12- and 14-bit). The SoftCell receiver comprises a
digital receiver capable of digitizing an entire spectrum of
carriers and digitally selecting the carrier of interest for tuning
and channel selection. This architecture eliminates redundant
radios in wireless base station applications.
High dynamic range decimation filters offer a wide range of
decimation rates. The RAM-based architecture allows easy
reconfiguration for multimode applications.
The decimating filters remove unwanted signals and noise from
the channel of interest. When the channel of interest occupies less
bandwidth than the input signal, this rejection of out-of-band
noise is called “processing gain.” By using large decimation
factors, this “processing gain” can improve the SNR of the
ADC by 30 dB or more. In addition, the programmable RAM
coefficient filter allows antialiasing, matched filtering, and
static equalization functions to be combined in a single, cost-
effective filter.
The AD6624A is compatible with standard ADC converters such
as the AD664x, AD9042, AD943x and the AD922x families of
data converters. The AD6624A is also compatible with the
AD6600 Diversity ADC, providing a cost and size reduction path.
Four-Channel, 100 MSPS Digital
Receive Signal Processor (RSP)
FUNCTIONAL BLOCK DIAGRAM
CH A
NCO
rCIC2
RESAMPLER
CIC5
RAM
COEFFICIENT
FILTER
16 BITS
18 BITS
20 BITS
24 BITS
INPUT
MATRIX
SERIAL
AND
MICROPORT
INA[13:0]
EXPA[2:0]
IENA
LIA-A
LIA-B
SYNCA
SYNCB
SYNCC
SYNCD
INB[13:0]
EXPB[2:0]
IENB
LIB-A
LIB-B
SDIN[3:0]
SDO[3:0]
DR[3:0]
SDFS[3:0]
SDFE[3:0]
SCLK[3:0]
MODE
DS
(
RD
)
CS
RW(
WR
)
DTACK
(RDY)
A[2:0]
D[7:0]
CH B
NCO
rCIC2
RESAMPLER
CIC5
RAM
COEFFICIENT
FILTER
CH C
NCO
rCIC2
RESAMPLER
CIC5
RAM
COEFFICIENT
FILTER
CH D
NCO
rCIC2
RESAMPLER
CIC5
RAM
COEFFICIENT
FILTER
EXTERNAL SYNC
CIRCUITRY
JTAG
INTERFACE
BUILT-IN
SELF-TEST
FEATURES
100 MSPS Wideband Inputs (14 Linear Bits Plus 3 RSSI)
Dual High-Speed Data Input Ports
Four Independent Digital Receivers in Single Package
Digital Resampling for Noninteger Decimation Rates
Programmable Decimating FIR Filters
Programmable Attenuator Control for Clip Prevention
and External Gain Ranging via Level Indicator
Flexible Control for Multicarrier and Phased Array
3.3 V I/O, 2.5 V CMOS Core
User-Configurable Built-In Self-Test (BIST) Capability
JTAG Boundary Scan
APPLICATIONS
Multicarrier, Multimode Digital Receivers GSM, IS136,
EDGE, PHS, IS95
Micro and Pico Cell Systems
Wireless Local Loop
Smart Antenna Systems
Software Radios
In-Building Wireless Telephony
PRODUCT DESCRIPTION
The AD6624A is a four-channel (quad) digital receive signal
processor (RSP) with four cascaded signal-processing elements:
a frequency translator, two fixed-coefficient decimating filters,
and a programmable-coefficient decimating filter.
SoftCell is a registered trademark of Analog Devices, Inc.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD6630AR-REEL | Differential, Low Noise IF Gain Block with Output Clamping |
| AD6630AR | Differential, Low Noise IF Gain Block with Output Clamping |
| AD6630PCB | Differential, Low Noise IF Gain Block with Output Clamping |
| AD6630R | Differential, Low Noise IF Gain Block with Output Clamping |
| AD6633 | Multichannel Digital Upconverter with VersaCREST Crest Reduction Engine |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6624AABCZ | 功能描述:DIGITAL SIGNAL PROC 196 CSP-BGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| AD6624AS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP) |
| AD6624AS/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) |
| AD6624S/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP) |
| AD662AQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:12-Bit Digital-to-Analog Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。