- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄352480 > A42MX16-3TQ100 (Electronic Theatre Controls, Inc.) 40MX and 42MX FPGA Families PDF資料下載
參數(shù)資料
| 型號(hào)： | A42MX16-3TQ100 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁(yè)數(shù)： | 115/120頁(yè) |
| 文件大?。?/td> | 854K |
| 代理商： | A42MX16-3TQ100 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)當(dāng)前第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)
94
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
Data Modes
There are two combinations of SCLK polarity with respect to the serial data, which are deter-
mined by the control bit T2CPOL (see Figure 3-36 on page 93). To ensure sufficient time for
data signal to stabilize it is recommended for external peripheral device to sample SO/SI with the
opposite edge that is used to shift out.
Bit 5 - Res: Reserved Bit
This bit is reserved bit at the ATA6289 and will always read as zero.
Bit 4 - T2TOP: Timer2 Toggle Output Preset Bit
The T2TOP bit must be written to logic one for set the toggle flip-flop, and if the T2TOP bit is
written to logic zero, toggle flip-flop is reset. This bit allows the programmer to preset the toggle
output flip-flop in the modulator of the Timer2.
Note:
If T2E = '1', no output preset is possible
Bits 3..0 - T2M3..0: Timer2 Mode Bits 3 - 0
The T2M[3..0] bits select the modes of theTimer2 and additional the configuration of the modula-
tor I/O-pins (T2O1, T2O2 and SDIN) as shown in Table 3-41.
Table 3-41.
Timer2 Mode Bit Description
Mode T2M3 T2M2 T2M1 T2M0 Timer2 Mode
Timer2 Modulator
I/O-pins
T2O1(1) T2O2(1) SDIN(1)
1
0
Timer/Counter Mode
PD5
PD6
PD7
2
0
1
Toggle Mode
M2
PD6
PD7
3
0
1
0
Toggle Mode
PD5
M2
PD7
40
0
1
PWM Mode
M2
PD6
PD7
50
1
0
PWM Mode
PD5
M2
PD7
60
1
0
1
Modulator Mode with SSI (ASK -
modulation of ATA5756/ATA57575(2))
SO
PD6
PD7
70
1
0
Modulator Mode with SSI (FSK -
modulation of ATA5756/ATA5757(2))
PD5
SO
PD7
8
0
1
SSI Transmit Mode
SO
SCLK
PD7
9
1
0
SSI Transmit Mode
SCLK
SO
PD7
10
1
0
1
SPI Mode
SO
SCLK
SI
11
1
0
1
0
Capture Mode
PD5
M2
PD7
12
1
0
1
Capture Mode
M2
PD6
PD7
13
11
00
Sensor Measurement Mode together with
Timer3
PD5
PD6
PD7
14
11
01
Reserved
PD5
PD6
PD7
15
11
10
Reserved
PD5
PD6
PD7
16
11
Reserved
PD5
PD6
PD7
Notes:
1. General Port I/O: PD5, PD6, PD7
Alternate port function:
M2
→ Output signal of the T2 (toggle flip-flop)
SO
→ SSI serial data output
SI
→ SSI serial data input
SCLK
→ SSI clock
2. As Atmel ATA6285/ATA6286 you can modulate the Atmel ATA5756/ATA5757 in these modes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX24-3TQ100 | 40MX and 42MX FPGA Families |
| A42MX36-3TQ100 | 40MX and 42MX FPGA Families |
| A42MX02-3TQ100A | 40MX and 42MX FPGA Families |
| A42MX04-3TQ100A | 40MX and 42MX FPGA Families |
| A42MX09-3TQ100A | 40MX and 42MX FPGA Families |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-3TQ100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。