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參數(shù)資料
| 型號(hào)： | A42MX16-3TQ100 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁數(shù)： | 10/120頁 |
| 文件大小： | 854K |
| 代理商： | A42MX16-3TQ100 |
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107
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
3.13.7.6
Timer3 Interrupt Flag Register – T3IFR
Bits 7..4 - Res: Reserved Bits
These bits are reserved bits at the ATA6289 and will always read as zero.
Bit 3 - T3ICF: Timer3 Input Capture Flag Bit
This flag is set (one) when a capture event occurs on the T3ICP pin and indicating that the
Timer3/Counter3 value has been transferred to the capture register (T3ICR). If the I-bit in SREG
and the T3CPIM bit is set (one) at T3IMR register, the MCU will jump to the corresponding Inter-
rupt Vector. T3ICF is automatically cleared when the interrupt routine is executed. Alternatively,
T3ICP can be cleared by writing a logic one.
Bit 2 - T3COBF: Timer3 COmpare B Flag Bit
This flag is set (one) if the Timer3/Counter3 value (T3CNT) matches with the Compare Register
B value. If the I-bit in SREG and the T3CBIM bit is set (one) at T3IMR register, the MCU will
jump to the corresponding Interrupt Vector. The flag (T3COBF) is cleared when the interrupt rou-
tine is executed. Alternatively, the flag can be cleared by writing a logical one.
Bit 1 - T3COAF: Timer3 COmpare A Flag Bit
This flag is set (one) if the Timer3/Counter3 value (T3CNT) matches with the Compare Register
A value. If the I-bit in SREG and the T3CAIM bit is set (one) at T3IMR register, the MCU will
jump to the corresponding Interrupt Vector. The flag (T3COAF) is cleared when the interrupt rou-
tine is executed. Alternatively, the flag can be cleared by writing a logical one.
Bit 0 - T3OFF: Timer3 OverFlow Flag Bit
This flag is set (one) if the Timer3/Counter3 overflow (OVF) occurs. If the I-bit in SREG and the
T3OIM bit is set (one) at T3IMR register, the MCU will jump to the corresponding Interrupt Vec-
tor. The flag is cleared when the interrupt routine is executed. Alternatively, the flag can be
cleared by writing a logical one.
Bit
765
43210
-
T3ICF
T3COBF T3COAF
T3OFF
T3IFR
Read/Write
RRRR
R/W
Initial Value
000
10000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX24-3TQ100 | 40MX and 42MX FPGA Families |
| A42MX36-3TQ100 | 40MX and 42MX FPGA Families |
| A42MX02-3TQ100A | 40MX and 42MX FPGA Families |
| A42MX04-3TQ100A | 40MX and 42MX FPGA Families |
| A42MX09-3TQ100A | 40MX and 42MX FPGA Families |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-3TQ100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3TQ100M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
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