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參數(shù)資料
| 型號： | 935269580557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, HTQFP-100 |
| 文件頁數(shù)： | 73/84頁 |
| 文件大小： | 1054K |
| 代理商： | 935269580557 |
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Philips Semiconductors
PNX8510/11
Analog Companion Chip
9397 750 08865
Koninklijke Philips Electronics N.V. Copyright 2001. All rights reserved.
Product data
Rev. 02 — 8 October 2001
75 of 84
Figure 26 shows the circuitry for the reconstruction filter of the video D/A converters.
12.3.1 Video DACs of Primary and Secondary Video Channels
The video DACs used in both the primary and secondary video channels employ segmented
current mode architecture. The programming feature of DACs is valid for both the primary and
secondary video channels.
The primary video channel has in its path four DACs: R, G, B and CVBS. The programming
option “Fine Adjust” — via the common four bits of I2C [3:0] — can simultaneously adjust the
central output level of all four DACs in a range of ± 7% in 1% increments. Please note the four
bits are signed values. The following table shows the programming values.
Figure 26: DAC Reconstruction Filter Circuitry
CVBS2
LUMA1
VOUT6
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
C40
RV5
75
RV6
75
RV7
75
CV3
390 PF
CV4
560 PF
CV5
390 PF
CV6
560 PF
CV7
390 PF
CV8
560 PF
120 PF
C41 120 PF
C42 120 PF
L7
2.7 UH
L5
2.7 UH
L3
2.7 UH
L4
2.7 UH
L6
2.7 UH
L8
2.7 UH
3
4
J7
S-Video
5
6
7
LUMA1_OUT
CHROMA1_OUT
RCA JACK
2
1
J6
Table 36: Common I2C Bits for all DACs (Output Level: Fine Adjustment in 1% Increments)
B03
B02
B01
B00
Vout
00
0
0%
00
0
1
+1%
00
1
0
+2%
00
1
+3%
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