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參數(shù)資料
| 型號： | 935269580557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, HTQFP-100 |
| 文件頁數(shù)： | 22/84頁 |
| 文件大?。?/td> | 1054K |
| 代理商： | 935269580557 |
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Philips Semiconductors
PNX8510/11
Analog Companion Chip
9397 750 08865
Koninklijke Philips Electronics N.V. Copyright 2001. All rights reserved.
Product data
Rev. 02 — 8 October 2001
29 of 84
For the video DACs 1 to 4, the primary 10-bit D1 interface (DV1_IN[9:0]) provides the 10-bit
input. Video DACs 5 and 6 are stimulated through the secondary D1 interface (DV2_IN[9:0]).
The serial audio data streams for the first stereo pair are provided through the I2S_IN1_SD and
the I2S_IN1_WS pins. The audio DAC pair 3 and 4 get their serial data through pins
I2S_IN2_SD and I2S_IN2_WS.
8.
Register Descriptions
The PNX8510/11 register space is divided into four different spaces. Each of them is addressed
by a different I2C device address. The first address space is dedicated to the primary video
channel, the second space belongs to the secondary video channel. The third I2C address
space accommodates the registers that control the first audio channel. The fourth I2C space is
used to address the secondary audio channel.
Table 17: Video DAC Test Modes
GPIO2
GPIO3
Test
0
VDAC1 and VDAC5 active
0
1
VDAC2 and VDAC6 active
1
0
VDAC3 and VDAC5 active
1
VDAC4 and VDAC6 active
Table 18: Audio DAC Test Modes
GPIO4
GPIO5
Test
0
ADAC1/2 and ADAC3/4 stereo pair first and second channel off
0
1
ADAC1/2 stereo pair first channel active
1
0
ADAC3/4 stereo pair second channel active
1
ADAC1/2 and ADAC3/4 stereo pair first and second channel active
Figure 24: Audio and Video DAC Test Modes
ADAC1
ADAC2
ADAC3
ADAC4
VDAC6
VDAC5
VDAC2
VDAC1
VDAC4
VDAC3
TEST
VIDEO
TEST
AUDIO
GPIO2
GPIO3
GPIO4
GPIO5
I2S_IN1_SD
I2S_IN2_SD
I2S_IN1_WS
I2S_IN2_WS
DV1_IN[9:0]
DV2_IN[9:0]
DECODER
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