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參數(shù)資料
| 型號(hào)： | 935269580557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, HTQFP-100 |
| 文件頁數(shù)： | 15/84頁 |
| 文件大?。?/td> | 1054K |
| 代理商： | 935269580557 |
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Koninklijke Philips Electronics N.V. Copyright 2001. All rights reserved.
9397 750 08865
22 of 84
Rev. 02 — 8 October 2001
Product data
PNX8510/11
Philips Semiconductors
Analog Companion Chip
3.
Audio Pipeline
The PNX8510/11 has two independent stereo channels, each connected to a separate audio
interface. The primary audio channel is usually associated with the primary video channel and
carries the accompanying sound information. The secondary audio channel usually carries the
audio belonging to the record (secondary) video channel. Because they might originate from
different sources, the two interfaces are operated by independent clocks.
Mute on/off is programmable by a register setting. Table 12 describes the expected audio
performance.
The audio path has three general blocks: input, interpolation, and DAC.
The input is, by default, a 24-bit I2S interface. However, it can be programmed to accept
other formats.
The interpolator scales, filters and oversamples the incoming data by 64 x its sampling
frequency. The result goes to a Noise Shaper, which shifts in-band noise to frequencies
well above the audio spectrum. This provides a very high signal-to-noise ratio.
Finite Impulse Response DACs convert the 1-bit data stream to analog output voltage.
3.1 Audio Interface Operation
The audio interfaces can be operated in either slave or master mode:
In slave mode, all required clocks (System CLK, SCK and WS) must be generated
externally and must be synchronous with each other.
In master mode, the PNX8510/11 only gets the System CLK and generates SCK and WS
clocks synchronously to the applied System CLK. In this mode, System CLK is equal to
128 x Fs where Fs is the audio sampling frequency.
Table 12: Audio Performance
Parameter
QFP100
Dynamic Range
85dB
S/(N+Disto.)
>85dB
Figure 16: Audio Path Block Diagram
Primary
I2S
Secondary
I2S
Interpolator
Left/Right
Interpolator
Left/Right
Σ
Noise
Shaper
Σ
Noise
Shaper
FIR-DAC-L
FIR-DAC-R
FIR-DAC-L
FIR-DAC-R
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