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參數(shù)資料
| 型號(hào)： | 854S057BGILF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | LOW SKEW CLOCK DRIVER, PDSO20 |
| 封裝： | ROHS COMPLIANT, MO-153, TSSOP-20 |
| 文件頁(yè)數(shù)： | 3/15頁(yè) |
| 文件大?。?/td> | 761K |
| 代理商： | 854S057BGILF |
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ICS854S057BI Data Sheet
4:1, OR 2:1 LVDS CLOCK MULTIPLEXER W/INTERNAL INPUT TERMINATION
ICS854S057BGI REVISION A MARCH 29, 2010
11
2010 Integrated Device Technology, Inc.
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS854S057BI.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS854S057BI is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for VDD = 2.5V + 5% = 2.625V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipation in the load.
Power (core)
MAX = V
DD_MAX * IDD_MAX = 2.625V * 50mA = 131.25mW
Power Dissipation for internal termination RT
Power (RT)MAX = 4 * (VPP_MAX)
2 / RT_MIN = (1.2V)2 / 80 = 72mW
Total Power_MAX = 131.25mW + 72mW = 203.25mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 92.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.203W * 92.1°C/W = 103.7°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance θJA for 20 Lead TSSOP, Forced Convection
θ
JA by Velocity
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
92.1°C/W
86.5°C/W
83.0°C/W
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 854S057BGILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 4-IN LVDS 20-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:20 TSSOP (LEAD-FREE) - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:4:1 or 2:1 LVDS Clk Multiplexer w/int |
| 854S058AGILF | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 854S058AGILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 8-IN LVDS 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:SMALL SIGE ARRAY - Bulk 制造商:Integrated Device Technology Inc 功能描述:DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX |
| 854S1208AYILF | 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP Tray 制造商:Integrated Device Technology Inc 功能描述:CLOCK MLTPLXR - Trays |
| 854S1208AYILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP T/R |
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