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參數(shù)資料
| 型號(hào)： | 854S057BGILF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | LOW SKEW CLOCK DRIVER, PDSO20 |
| 封裝： | ROHS COMPLIANT, MO-153, TSSOP-20 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 761K |
| 代理商： | 854S057BGILF |
ICS854S057BI Data Sheet
4:1, OR 2:1 LVDS CLOCK MULTIPLEXER W/INTERNAL INPUT TERMINATION
ICS854S057BGI REVISION A MARCH 29, 2010
4
2010 Integrated Device Technology, Inc.
Table 4D. LVDS DC Characteristics, VDD = 2.5V ± 5%, TA = -40°C to 85°C
Table 5. AC Characteristics, VDD = 2.5V ± 5%, TA = -40°C to 85°C
NOTE: All parameters measured at
≤ 1.9GHz unless noted otherwise.
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between different devices operating at the same supply voltage, same frequency and with equal load conditions.
Using the same type of inputs on each device, the output is measured at the differential cross point.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VOD
Differential Output Voltage
225
325
425
mV
V
OD
VOD Magnitude Change
4
35
mV
VOS
Offset Voltage
1.125
1.25
1.375
V
OS
VOS Magnitude Change
5
25
mV
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
fMAX
Output Frequency
>2
GHz
tPD
Propagation Delay; NOTE 1
300
800
ps
tsk(pp)
Part-to-Part Skew; NOTE 2, 3
200
ps
tsk(i)
Input Skew
40
ps
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
622.08MHz, Integration Range:
12kHz – 20MHz
0.065
ps
tR / tF
Output Rise/Fall Time
20% to 80%
50
250
ps
odc
Output Duty Cycle
≤ 700MHz
49
51
%
≤ 1.1GHz
47
53
%
≤ 2GHz
43
57
%
MUXISOLATION MUX Isolation
= 500MHz
-65
dBm
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 854S057BGILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 4-IN LVDS 20-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:20 TSSOP (LEAD-FREE) - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:4:1 or 2:1 LVDS Clk Multiplexer w/int |
| 854S058AGILF | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 854S058AGILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 8-IN LVDS 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:SMALL SIGE ARRAY - Bulk 制造商:Integrated Device Technology Inc 功能描述:DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX |
| 854S1208AYILF | 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP Tray 制造商:Integrated Device Technology Inc 功能描述:CLOCK MLTPLXR - Trays |
| 854S1208AYILFT | 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP T/R |
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