參數(shù)資料
型號： 854S057BGILF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時鐘及定時
英文描述： LOW SKEW CLOCK DRIVER, PDSO20
封裝： ROHS COMPLIANT, MO-153, TSSOP-20
文件頁數(shù)： 15/15頁
文件大?。?/td> 761K
代理商： 854S057BGILF
ICS854S057BI Data Sheet
4:1, OR 2:1 LVDS CLOCK MULTIPLEXER W/INTERNAL INPUT TERMINATION
ICS854S057BGI REVISION A MARCH 29, 2010
9
2010 Integrated Device Technology, Inc.
2.5V LVPECL Input with Built-In 50 Termination Interface
The PCLK /nPCLK with built-in 50
terminations accept LVDS,
LVPECL, CML, SSTL and other differential signals. Both differential
signals must meet the VPP and VCMR input requirements. Figures 2A
to 2E show interface examples for the PCLK /nPCLK with built-in 50
termination input driven by the most common driver types. The input
interfaces suggested here are examples only. If the driver is from
another vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confirm the driver
termination requirements.
Figure 2A. PCLK/nPCLK Input with
Built-In 50
Driven by an LVDS Driver
Figure 2C. PCLK/nPCLK Input with
Built-In 50
Driven by a CML Driver
Figure 2E. PCLK/nPCLK Input with
Built-In 50
Driven by an SSTL Driver
Figure 2B. PCLK/nPCLK Input with
Built-In 50
Driven by an LVPECL Driver
Figure 2D. PCLK/nPCLK Input with Built-In 50
Driven
by a CML Driver with Built-In 50
Pullup
PCLK
nPCLK
VT
Receiver
With
Built-In
50
LVDS
3.3V or 2.5V
2.5V
Zo = 50
Zo = 50
PCLK
nPCLK
VT
CML
Receiver
With
Built-In
50
2.5V
Zo = 50
Zo = 50
SSTL
R1
25
R2
25
PCLK
nPCLK
VT
Receiver
With
Built-In
50
2.5V
Zo = 50
Zo = 50
PCLK
nPCLK
VT
Receiver
With
Built-In
50
R1
18
LVPECL
2.5V
Zo = 50
Zo = 50
CML - Built-in 50
Pull-up
PCLK
nPCLK
VT
Receiver
With
Built-In
50
2.5V
Zo = 50
Zo = 50
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
854S057BGILFT 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 4-IN LVDS 20-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:20 TSSOP (LEAD-FREE) - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:4:1 or 2:1 LVDS Clk Multiplexer w/int
854S058AGILF 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
854S058AGILFT 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 8-IN LVDS 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:SMALL SIGE ARRAY - Bulk 制造商:Integrated Device Technology Inc 功能描述:DIFFERENTIAL-TO-LVDS 8:1 CLOCK MULTIPLEX
854S1208AYILF 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP Tray 制造商:Integrated Device Technology Inc 功能描述:CLOCK MLTPLXR - Trays
854S1208AYILFT 制造商:Integrated Device Technology Inc 功能描述:Clock Driver 2-IN LVDS 48-Pin TQFP EP T/R
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