參數(shù)資料
型號(hào)： 84225
廠商： LSI Corporation
英文描述： Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device （Highly Integrated Ethernet Transceiver For Twisted Pair And Fiber Ethernet Applications）(四通道100BaseTX/100BaseFX/10BaseT 物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器）)
中文描述： 四100BaseTX/100BaseFX/10BaseT物理層裝置（高度集成的以太網(wǎng)收發(fā)器，雙絞線和光纖以太網(wǎng)的應(yīng)用）（四通道100BaseTX/100BaseFX/10BaseT物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器） ）
文件頁(yè)數(shù)： 85/86頁(yè)
文件大?。?/td> 1297K
代理商： 84225
MD400183/A
85
84225
Revision History
Page 41, Table 15 Register 4 - AutoNegotiation Advertisement Register Definition
- Bit 4.10 has been changed from 0 to PAUSE.
- Row 4.10 has been added.
Page 42, Table 16 Register 5 - AutoNegotiation Remote Capability Definition
- Bit 5.10 has been changed from 0 to PAUSE.
- Row 5.10 has been added.
Page 45, Table 17 Register 18 - Channel Status Output Register Definition
- Bit 18.7, is now blank.
- Row Bit 18.7, Symbol is now blank, Name is now blank, Definition has been changed to Reserved.
Page 49, Figure 12. Typical Switching Hub Port Schematic Using the 84225 in Twisted Pair Mode
- References to JAM and MDINT have been changed to AD_REV and REGDEF, respectively.
Page 50, Figure 13. Typical Switching Hub Port Schematic Using the 84225 in FX Mode with 3.3V Transceivers
- References to JAM and MDINT have been changed to AD_REV and REGDEF, respectively.
Page 73, Collision Characteristics
- Any references to Jam have been deleted.
- Row t
59
has been deleted.
Page 77, Figure 26. Jam Timing
- Figure 26 Jam Timing has been deleted.
Page 79, Figure 26. NLP Link Pulse Timing
- Figure 26. NLP Link Pulse Timing is new.
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