參數(shù)資料
型號: 84225
廠商: LSI Corporation
英文描述: Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device (Highly Integrated Ethernet Transceiver For Twisted Pair And Fiber Ethernet Applications)(四通道100BaseTX/100BaseFX/10BaseT 物理層處理器(高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器))
中文描述: 四100BaseTX/100BaseFX/10BaseT物理層裝置(高度集成的以太網(wǎng)收發(fā)器,雙絞線和光纖以太網(wǎng)的應(yīng)用)(四通道100BaseTX/100BaseFX/10BaseT物理層處理器(高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器) )
文件頁數(shù): 8/86頁
文件大?。?/td> 1297K
代理商: 84225
8
MD400183/A
84225
1.0 PIN DESCRIPTION (cont’d)
Miscellaneous
Pin #
Pin Name
I/O
Description
111
ANEG
I
AutoNegotiation Enable Input.
0.12, enables AutoNegotiation for all channels.
This digital input, ANDed with register bit
1 = AutoNegotiation On & Combined with Speed and Duplex pins,
control advertisement. Please refer to Table 1 for the
different combinations.
0 = Off
120
119
113
112
SPEED_[3:0]
I
Speed Selection Input.
select speed in each corresponding channel. Please refer to Table 1 for the
different combinations.
These digital inputs, ANDed with register bit 0.13,
1 = 100 Mbps Mode
0 = 10 Mbps Mode
103
104
105
106
DPLX_[3:0]
I
Duplex Selection Input.
select the duplex mode in EACH corresponding channel. They control
advertisement when ANEG is enabled. Please refer to Table 1 for the
different combinations.
These digital inputs, ORed with register bit 0.8,
1 = Full Duplex Mode
0 = Half Duplex Mode
102
REPEATER
I
Repeater Mode Enable Input.
17.14, enables repeater mode for ALL channels.
This digital input, ORed with register bit
1 = Repeater Mode Enabled
0 = Normal Operation
101
RMII_EN
I
Reduced Pin Count MII Interface Enable.
1 = RMII Mode Enabled
0 = MII Enabled
17
AD_REV
I
Pullup
Address Reverse Input.
1 = Normal
In this mode, physical ports 0-3 are mapped to MI
addresses 0-3 in the same order.
0 = Reverse Address Mode Select
In this mode, physical ports 0-3 are mapped to MI addresses 3-0
respectively. This is the reverse to the normal order.
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