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參數(shù)資料
| 型號： | 84225 |
| 廠商： | LSI Corporation |
| 英文描述： | Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device （Highly Integrated Ethernet Transceiver For Twisted Pair And Fiber Ethernet Applications）(四通道100BaseTX/100BaseFX/10BaseT 物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器）) |
| 中文描述： | 四100BaseTX/100BaseFX/10BaseT物理層裝置（高度集成的以太網(wǎng)收發(fā)器，雙絞線和光纖以太網(wǎng)的應用）（四通道100BaseTX/100BaseFX/10BaseT物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器） ） |
| 文件頁數(shù)： | 1/86頁 |
| 文件大?。?/td> | 1297K |
| 代理商： | 84225 |
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MD400183/A
1
84225
Features
I
Single Chip 100BaseTX/100BaseFX/10BaseT
Physical Layer Solution
I
Four Independent Channels in One IC
I
3.3V Power Supply with 5V Tolerant I/O
I
Dual Speed - 10/100 Mbps
I
Half and Full Duplex
I
MII Interface or Reduced Pin Count MII (RMII)
Interface to Ethernet Controller
I
MI Interface for Configuration and Status
I
Optional Repeater Interface
I
AutoNegotiation for 10/100, Full/Half Duplex
Hardware Controlled Advertisement
I
Meets all Applicable IEEE 802.3, 10BaseT,
100BaseTX and 100BaseFX Standards
I
On Chip Wave Shaping - No External Filters
Required
I
Adaptive Equalizer for 100BaseTX
I
Baseline Wander Correction
I
LED Outputs
Link
Activity
Collision
Full Duplex
Far End Fault (for FX)
10/100
I
160L PQFP
Description
The 84225 is a highly integrated Ethernet Transceiver for
twisted pair and fiber Ethernet applications. The 84225
can be configured for either 100 Mbps (100BaseFX or
100BaseTX) or 10 Mbps (10BaseT) Ethernet operation.
The 84225 consists of four (4) separate and independent
channels. Each channel consists of: 4B5B/Manchester
encoder, scrambler, transmitter with wave shaping and on-
chip filters, transmit output driver, receiver with adaptive
equalizer, filters, baseline wander correction, clock and
data recovery, descrambler, 4B5B/Manchester decoder,
and controller interface (MII or RMII).
The addition of internal output waveshaping circuitry and
on-chip filters eliminates the need for external filters
normally
required
in
100BaseTX
applications.
and
10BaseT
The 84225 can automatically configure itself for 100 or 10
Mbps and Full or Half Duplex operation, for each channel
independently,
using
the
algorithm.
on-chip
AutoNegotiation
The 84225 can access eleven 16-bit registers for each
channel through the Management Interface (MI) serial
port. These registers comply to Clause 22 of IEEE 802.3u
and contain configuration inputs, status outputs, and
device capabilities.
The 84225 is ideal as a media interface for 100BaseTX/
100BaseFX/10BaseT switching hubs, repeaters, routers,
bridges, and other multi port applications.
The 84225 is implemented in a low power CMOS
technology and operates with a 3.3V power supply.
99061
Quad 100BaseTX/FX/10BaseT
Physical Layer Device
Note: Check for latest Data Sheet revision before
starting any designs.
SEEQ Data Sheets are now on the Web, at
www.lsilogic.com
This document is an LSI Logic document. Any
reference to SEEQ Technology should be consid-
ered LSI Logic.
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| 842-250G | 功能描述:化學物質(zhì) SILVER PRINT - BULK 250G (8.8 OZ) LIQUID RoHS:否 制造商:3M Electronic Specialty 產(chǎn)品:Adhesives 類型:Epoxy Compound 大小:1.7 oz 外殼:Plastic Tube |
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