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Datasheet
82562G — Networking Silicon
6.1.6
6.1.7
Register 5: Auto-Negotiation Link Partner Ability Register Bit Definitions ..........22
Register 6: Auto-Negotiation Expansion Register Bit Definitions .......................22
MDI Registers 8 through 15.......................................................................................23
MDI Registers 16 through 31.....................................................................................23
Register 16: PHY Status and Control Register Bit Definitions ............................23
Register 17: PHY Unit Special Control Bit Definitions ........................................24
Register 18: Reserved ........................................................................................24
Register 19: 100BASE-TX Receive False Carrier Counter Bit Definitions .........25
Register 20: 100BASE-TX Receive Disconnect Counter Bit Definitions ............25
Register 21: 100BASE-TX Receive Error Frame Counter Bit Definitions ...........25
Register 22: Receive Symbol Error Counter Bit Definitions ...............................25
Register 23: 100BASE-TX Receive Premature End of Frame
Error Counter Bit Definitions ...............................................................................25
Register 24: 10BASE-T Receive End of Frame Error Counter Bit Definitions ....26
Register 25: 10BASE-T Transmit Jabber Detect Counter Bit Definitions ...........26
Register 27: PHY Unit Special Control Bit Definitions ........................................27
6.2
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10
6.3.11
7.0
82562G Test Port Functionality........................................................................................29
Asynchronous Test Mode ..........................................................................................29
Test Function Description ..........................................................................................29
7.1
7.2
8.0
Electrical and Timing Specifications.................................................................................31
Absolute Maximum Ratings .......................................................................................31
DC Characteristics ....................................................................................................31
X1 Clock DC Specifications ................................................................................31
LAN Connect Interface DC Specifications ..........................................................32
LED DC Specifications .......................................................................................32
10BASE-T Voltage and Current DC Specifications ............................................32
100BASE-TX Voltage and Current DC Specifications ........................................33
AC Characteristics .....................................................................................................34
10BASE-T Normal Link Pulse (NLP) Timing Parameters ...................................34
Auto-Negotiation Fast Link Pulse (FLP) Timing Parameters ..............................35
100BASE-TX Transmitter AC Specifications ......................................................36
Reset (RSTSYNC) AC Specifications ................................................................36
8.1
8.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.3
8.3.1
8.3.2
8.3.3
8.3.4
9.0
Package and Pinout Information......................................................................................37
Package Information..................................................................................................37
Pinout Information......................................................................................................38
82562G Pin Assignments ...................................................................................38
82562G Shrink Small Outline Package Diagram ................................................39
9.1
9.2
9.2.1
9.2.2