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IDT EJTAG System
Hardware Breakpoints
79RC32438 User Reference Manual
20 - 40
November 4, 2002
Notes
Precise Match for Data Breakpoints
A precise match for a data breakpoint occurs when the match equation can be fully evaluated at the time
the load/store instruction is executed. A true DB_match can thereby be indicated on the very same instruc-
tion causing the DB_match equation to be true. Matches on data breakpoints without data value compares
are always precise. Accesses using data value compares are either imprecise or precise depending on the
implementation and specific access.
Imprecise Match for Data Breakpoints
An imprecise match for a data breakpoint occurs when the match equation cannot be fully evaluated at
the time the load/store instruction is executed. This case occurs when the processor is not stalled on a
scheduled load and a data breakpoint must compare on the data value returned by the load. If the break-
point matches, then the DB_match equation is true later in the execution flow rather than at the same time
as load/store instruction that caused the load/store access to match. Only data breakpoints with value
compares can be imprecise, in which case the breakpoints can be imprecise for all or some of those
accesses depending on the implementation.
Debug Exceptions from Breakpoints
This section describes how to set up instruction and data breakpoints to generate debug exceptions
when the match conditions are true.
Debug Exception Caused by Instruction Breakpoint
The BE bit in the IBCn register must be set for an instruction breakpoint to be enabled. A Debug Instruc-
tion Break exception occurs when the IB_match equation is true (see section“Conditions for Matching
Instruction Breakpoints” on page 20-35). The corresponding BS bit in the IBS register is set when the
breakpoint generates the debug exception. The Debug Instruction Break exception is precise, so the DEPC
register and DBD bit in the Debug register point to the instruction that caused the IB_match equation to be
true. The instruction receiving the debug exception only updates the debug related registers. That instruc-
tion will not cause any loads/stores to occur. Thus a debug exception from a data breakpoint cannot occur
at the same time an instruction receives a Debug Instruction Break exception.
The debug handler usually returns to the instruction causing the Debug Instruction Break exception,
whereby the instruction is executed. Debug software must disable the breakpoint when returning to the
instruction, otherwise the Debug Instruction Break exception will reoccur. An alternative is for debug soft-
ware to emulate the instruction(s) in software and change the DEPC accordingly.
Debug Exception by Data Breakpoint
The BE bit in the DBCn register must be set for a data breakpoint to be enabled. A debug exception
occurs when the DB_match condition is true. A matching data breakpoint generates either a precise or an
imprecise debug exception (see section “Precise / Imprecise Debug Exceptions on Data Breakpoints with
Data Value Compares” on page 20-52).
Debug Data Break Load/Store Exception as a Precise Debug Exception
A Debug Data Break Load/Store exception occurs when a data breakpoint indicates a precise match. In
this case, the DEPC register and DBD bit in the Debug register point to the load/store instruction that
caused the DB_match equation to be true, and the corresponding BS bit in the DBS register is set. Details
about behavior of the instruction causing the debug exception is shown in Table 20.25.