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參數(shù)資料
| 型號： | 7782 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32 Mbit (2Mb x 16, Dual Bank, Burst ) 1.8V Supply Flash Memory |
| 中文描述： | 32兆位（含2Mb × 16，雙行，突發(fā)）1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 29/63頁 |
| 文件大?。?/td> | 435K |
| 代理商： | 7782 |
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M58CR032C, M58CR032D
STATUS REGISTER
The M58CR032 has two Status Registers, one for
each bank. The Status Registers provide informa-
tion on the current or previous Program or Erase
operations executed in each bank. The various
bits convey information and errors on the opera-
tion. Issue a Read Status Register command to
read the Status Register content of the addressed
bank, refer to Read Status Register Command
section for more details. To output the contents,
the Status Register is latched on the falling edge
of the Chip Enable or Output Enable signals, and
can be read until Chip Enable or Output Enable re-
turns to V
IH
. Either Chip Enable or Output Enable
must be toggled to update the latched data.
Bus Read operations from any address within the
bank, always read the Status Register during Pro-
gram and Erase operations.
The bits in the Status Register are summarized in
Table 15, Status Register Bits. Refer to Table 15
in conjunction with the following text descriptions.
Program/Erase Controller Status (Bit 7).
The Pro-
gram/Erase Controller Status bit indicates whether
the Program/Erase Controller is active or inactive
in the addressed bank. When the Program/Erase
Controller Status bit is Low (set to ‘0’), the Pro-
gram/Erase Controller is active; when the bit is
High (set to ‘1’), the Program/Erase Controller is
inactive, and the device is ready to process a new
command.
The Program/Erase Controller Status is Low im-
mediately after a Program/Erase Suspend com-
mand is issued until the Program/Erase Controller
pauses. After the Program/Erase Controller paus-
es the bit is High .
During Program, Erase, operations the Program/
Erase Controller Status bit can be polled to find the
end of the operation. Other bits in the Status Reg-
ister should not be tested until the Program/Erase
Controller completes the operation and the bit is
High.
After the Program/Erase Controller completes its
operation the Erase Status, Program Status, V
PP
Status and Block Lock Status bits should be tested
for errors.
Erase Suspend Status (Bit 6).
The Erase Sus-
pend Status bit indicates that an Erase operation
has been suspended or is going to be suspended
in the addressed block. When the Erase Suspend
Status bit is High (set to ‘1’), a Program/Erase
Suspend command has been issued and the
memory is waiting for a Program/Erase Resume
command.
The Erase Suspend Status should only be consid-
ered valid when the Program/Erase Controller Sta-
tus bit is High (Program/Erase Controller inactive).
Bit 7 is set within 30μs of the Program/Erase Sus-
pend command being issued therefore the memo-
ry may still complete the operation rather than
entering the Suspend mode.
When a Program/Erase Resume command is is-
sued the Erase Suspend Status bit returns Low.
Erase Status (Bit 5).
The Erase Status bit can be
used to identify if the memory has failed to verify
that the block has erased correctly. When the
Erase Status bit is High (set to ‘1’), the Program/
Erase Controller has applied the maximum num-
ber of pulses to the block and still failed to verify
that the block has erased correctly. The Erase Sta-
tus bit should be read once the Program/Erase
Controller Status bit is High (Program/Erase Con-
troller inactive).
Once set High, the Erase Status bit can only be re-
set Low by a Clear Status Register command or a
hardware reset. If set High it should be reset be-
fore a new Program or Erase command is issued,
otherwise the new command will appear to fail.
Program Status (Bit 4).
The Program Status bit
is used to identify a Program failure. When the
Program Status bit is High (set to ‘1’), the Pro-
gram/Erase Controller has applied the maximum
number of pulses to the Byte and still failed to ver-
ify that it has programmed correctly. The Program
Status bit should be read once the Program/Erase
Controller Status bit is High (Program/Erase Con-
troller inactive).
Once set High, the Program Status bit can only be
reset Low by a Clear Status Register command or
a hardware reset. If set High it should be reset be-
fore a new command is issued, otherwise the new
command will appear to fail.
V
PP
Status (Bit 3).
The V
PP
Status bit can be
used to identify an invalid voltage on the V
PP
pin
during Program and Erase operations. The V
PP
pin is only sampled at the beginning of a Program
or Erase operation. Indeterminate results can oc-
cur if V
PP
becomes invalid during an operation.
When the V
PP
Status bit is Low (set to ‘0’), the volt-
age on the V
PP
pin was sampled at a valid voltage;
when the V
PP
Status bit is High (set to ‘1’), the V
PP
pin has a voltage that is below the V
PP
Lockout
Voltage, V
PPLK
, the memory is protected and Pro-
gram and Erase operations cannot be performed.
Once set High, the V
PP
Status bit can only be reset
Low by a Clear Status Register command or a
hardware reset. If set High it should be reset be-
fore a new Program or Erase command is issued,
otherwise the new command will appear to fail.
Program Suspend Status (Bit 2).
The Program
Suspend Status bit indicates that a Program oper-
ation has been suspended in the addressed block.
When the Program Suspend Status bit is High (set
to ‘1’), a Program/Erase Suspend command has
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