參數(shù)資料
型號： 7640
英文描述： IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-PDIP, TUBE
中文描述： 7640組數(shù)據(jù)表數(shù)據(jù)表1885K/SEP.05.00
文件頁數(shù)： 37/97頁
文件大?。?/td> 1885K
代理商： 7640
36
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
1.17.4 Timer 2
Timer 2 is an 8-bit timer with an 8-bit reload latch (see
Figure 1.35).
T123M7 (bit 7 of T123M) is the Timer 1 and 2 Data
Write Control Bit. If T123M7 is “1”, data written to
Timer 2 is placed only in the Timer 2 reload latch (see
Figure 1.32). The latch value is loaded into Timer 2
after Timer 2 underflows. If the T123M7 is “0”, the
value written to Timer 2 is placed in Timer 2 and the
Timer 2 reload latch. At reset, T123M2 is set to a “0”.
The Timer 2 reload latch value is not affected by a
change of the count source. However, because
changing the count source may cause an inadvertent
countdown of the timer, the timer should be rewritten
when the count source is changed.
Timer Mode
Count Source:
If T123M3 is “0”, the Timer 2 count source is the
Timer 1 underflow output.
If T123M3 is “1”, the Timer 2 count source is .
In Timer mode, each time the timer underflows, the
corresponding timer interrupt request bit is set to a
“1”, the contents of the timer latch are loaded into
the timer, and the count down sequence begins
again.
Pulse Output Mode
Count Source:
If T123M3 is “0”, the Timer 2 count source is the
Timer 1 underflow output.
If T123M3 is “1”, the Timer 2 count source is .
Timer 2 Pulse Output mode is enabled by setting
T123M6 to a “1” and T123M0 to a “1”. Each time the
Timer 2 underflows, the output of the TOUT pin is
inverted, and the corresponding Timer 2 interrupt
request bit is set to a “1”. The repeated inversion of
the TOUT pin output produces a rectangular wave-
form with a duty ratio of 50 percent. The initial level
of the output is determined by the TOUT polarity se-
lect bit (T123M5). When this bit is “0”, the output
starts from a high level. When this bit is “1”, the out-
put starts from a low level.
1.17.5 Timer 3
Timer 3 is an 8-bit timer with an 8-bit reload latch (see
Figure 1.35). The Timer 3 reload latch value is not af-
fected by a change of the count source. Because
changing the count source may cause an inadvertent
countdown of the timer, the timer should be rewritten
whenever the count source is changed.
Timer Mode
Count Source:
If T123M4 is “0”, the Timer 3 count source is the
Timer 1 underflow output.
If T123M4 is “1”, the count source is /8
In Timer mode, each time the timer underflows, the
corresponding timer interrupt request bit is set to a
“1”, the contents of the timer latch are loaded into the
timer, and the count down sequence begins again.
Data written to Timer 3 is always placed in Timer 3
and the Timer 3 reload latch.
相關(guān)PDF資料
PDF描述
7641 7641 Group Datasheet Datasheet 2145K/MAR.26.02
7643 IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-SOIC 300mil, TUBE
765-11-(SERIES) Analog IC
765-11-20K Analog IC
765-11-25A Analog IC
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