參數(shù)資料
型號(hào): 71V65703S85BQ
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: SRAM
英文描述: 256K X 36 ZBT SRAM, 8.5 ns, PBGA165
封裝: 13 X 15 MM, 1.2 MM HEIGHT, 1 MM PITCH, FPBGA-165
文件頁數(shù): 24/26頁
文件大?。?/td> 512K
代理商: 71V65703S85BQ
6.42
IDT71V65703, IDT71V65903, 256K x 36, 512K x 18, 3.3V Synchronous ZBT SRAMs with
3.3V I/O, Burst Counter, and Flow-Through Outputs
Commercial and Industrial Temperature Ranges
7
12345
67
A
VDDQ
A6
A4
A8
A16
VDDQ
B
NC
CE 2
A3
ADV/LD
A9
CE2
NC
C
A7
A2
VDD
A12
A15
NC
D
I/O16
I/OP3
VSS
NC
VSS
I/OP2
I/O15
E
I/O17
I/O18
VSS
I/O13
I/O14
F
VDDQ
I/O19
VSS
OE
VSS
I/O12
VDDQ
G
I/O20
I/O21
BW3
BW2
I/O11
I/O10
H
I/O22
I/O23
VSS
R/
W
VSS
I/O9
I/O8
J
VDDQ
VDD
VDDQ
K
I/O24
I/O26
VSS
CLK
VSS
I/O6
I/O7
L
I/O25
I/O27
BW4
NC
BW1
I/O4
I/O5
M
VDDQ
I/O28
VSS
CEN
VSS
I/O3
VDDQ
N
I/O29
I/O30
VSS
A1
VSS
I/O2
I/O1
P
I/O31
I/OP4
VSS
A0
VSS
I/O0
I/OP1
R
NC
A5
LBO
VDD
A13
T
NC
A10
A11
A14
NC
ZZ
U
VDDQ
DNU(4)
VDDQ
5298 drw 13a
VSS(1)
NC
NC(3)
CE1
A17
VDD(2)
VSS(1)
,
NC
1
234567
A
VDDQ
A6
A4
NC(3)
A8
A16
VDDQ
B
NC
CE2
A3
ADV/
LD
A9
CE2
NC
C
A7
A2
VDD
A13
A17
NC
D
I/O8
NC
VSS
NC
VSS
I/O
NC
E
NC
I/O9
VSS
NC
I/O
F
VDDQ
NC
VSS
OE
VSS
I/O
VDDQ
G
NC
I/O10
BW2
NC
I/O
H
I/O11
NC
VSS
R/
W
VSS
I/O
NC
J
VDDQ
VDD
VDDQ
K
NC
I/O12
VSS
CLK
VSS
NC
I/O
L
I/O13
NC
BW1
I/O
NC
M
VDDQ
I/O14
VSS
CEN
VSS
NC
VDDQ
N
I/O15
NC
VSS
A1
VSS
I/O
NC
P
NC
I/OP2
VSS
A0
VSS
NC
I/O
R
NC
A5
LBO
VDD
A12
T
NC
A10
A15
NC
A14
A11
ZZ
U
VDDQ
DNU(4)
VDDQ
5298 drw 13b
NC
SS(1)
V
VSS
CE1
A18
VDD(2)
VSS(1)
,
NC
Pin Configuration 256K x 36, 119 BGA
Pin Configuration 512K x 18, 119 BGA
Top View
NOTES:
1. R5 and J5 do not have to be directly connected to VSS as long as the input voltage is < VIL.
2. J3 does not have to be connected directly to VDD as long as the input voltage is
≥ VIH.
3. A4 is reserved for future 16M.
4. DNU = Do not use; Pin U2, U3, U4, U5 and U6 are reserved for respective JTAG pins: TMS, TDI, TCK, TDO and
TRST. The current die revision allows
these pins to be left unconnected, tied LOW (VSS), or tied HIGH (VDD).
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