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| 型號(hào)： | 71M6542F-IGTR/F |
| 廠(chǎng)商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類(lèi)： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封裝： | LEAD FREE, LQFP-100 |
| 文件頁(yè)數(shù)： | 22/165頁(yè) |
| 文件大小： | 2208K |
| 代理商： | 71M6542F-IGTR/F |
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118
2008–2011 Teridian Semiconductor Corporation
v1.1
Name
Location
Rst Wk
Dir
Description
LCD_VMODE[1:0]
2401[7:6]
00 00 R/W
Specifies how VLCD is generated. See 2.5.8.4 for the definition of V3P3L.
LCD_VMODE
Description
11
External VLCD
10
LCD boost and LCD DAC enabled
01
LCD DAC enabled
00
No boost and no DAC. VLCD=V3P3L.
LCD_Y
2400[2]
0
–
R/W
LCD Blink Frequency (ignored if blink is disabled).
1 = 1 Hz, 0 = 0.5 Hz
LKPADDR[6:0]
2887[6:0]
0
R/W The address for reading and writing the RTC lookup RAM
LKPAUTOI
2887[7]
0
R/W
Auto-increment flag. When set, LKPADDR auto-increments every time
LKP_RD or LKP_WR is pulsed. The incremented address can be read at
LKPADDR[6:0].
LKPDAT[7:0]
2888[7:0]
0
R/W The data for reading and writing the RTC lookup RAM.
LKP_RD
LKP_WR
2889[1]
2889[0]
0
R/W
Strobe bits for the RTC lookup RAM read and write. When set, the
LKPADDR[6:0] field and LKPDAT register is used in a read or write
operation. When a strobe is set, it stays set until the operation completes, at
which time the strobe is cleared and LKPADDR[6:0] is incremented if the
LKPAUTOI bit is set.
MPU_DIV[2:0]
2200[2:0]
0
R/W
MPU clock rate is:
MPU Rate = MCK Rate * 2
-(2+MPU_DIV[2:0]).
The maximum value for MPU_DIV[2:0] is 4. Based on the default values of
the PLL_FAST bit and MPU_DIV[2:0], the power up MPU rate is 6.29 MHz / 4
= 1.5725 MHz. The minimum MPU clock rate is 38.4 kHz when PLL_FAS T =
1.
MUX0_SEL[3:0]
2105[3:0]
0
R/W Selects which ADC input is to be converted during time slot 0.
MUX1_SEL[3:0]
2105[7:4]
0
R/W Selects which ADC input is to be converted during time slot 1.
MUX2_SEL[3:0]
2104[3:0]
0
R/W Selects which ADC input is to be converted during time slot 2.
MUX3_SEL[3:0]
2104[7:4]
0
R/W Selects which ADC input is to be converted during time slot 3.
MUX4_SEL[3:0]
2103[3:0]
0
R/W Selects which ADC input is to be converted during time slot 4.
MUX5_SEL[3:0]
2103[7:4]
0
R/W Selects which ADC input is to be converted during time slot 5.
MUX6_SEL[3:0]
2102[3:0]
0
R/W Selects which ADC input is to be converted during time slot 6.
MUX7_SEL[3:0]
2102[7:4]
0
R/W Selects which ADC input is to be converted during time slot 7.
MUX8_SEL[3:0]
2101[3:0]
0
R/W Selects which ADC input is to be converted during time slot 8.
MUX9_SEL[3:0]
2101[7:4]
0
R/W Selects which ADC input is to be converted during time slot 9.
MUX10_SEL[3:0]
2100[3:0]
0
R/W Selects which ADC input is to be converted during time slot 10.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 71M6541D-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP64 |
| 71M6542G-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 71M6541G-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP64 |
| 71M6541F-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP64 |
| 71M6543F-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 71M6542FT-IGT/F | 制造商:Maxim Integrated Products 功能描述:1-PHASE SOC 128KB WITH PREC TEMP SENSOR - Rail/Tube |
| 71M6542FT-IGTR/F | 制造商:Maxim Integrated Products 功能描述:1-PHASE SOC, 64KB FLASH, PRES TEMP SENSOR - Tape and Reel |
| 71M6542G | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:71M6541D/71M6541F/71M6541G/71M6542F/71M6542G 是 TeridianTM 的第4 代高集成度單相電表SoC |
| 71M6542G-IGT/F | 功能描述:計(jì)量片上系統(tǒng) - SoC 1-Phase Metering SOC with 128KB Flash RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類(lèi)型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類(lèi)型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6542G-IGTR/F | 制造商:Maxim Integrated Products 功能描述:- Tape and Reel |
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