參數(shù)資料
型號(hào): 71M6542F-IGTR/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP100
封裝: LEAD FREE, LQFP-100
文件頁(yè)數(shù): 113/165頁(yè)
文件大?。?/td> 2208K
代理商: 71M6542F-IGTR/F
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)當(dāng)前第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)
v1.1
2008–2011 Teridian Semiconductor Corporation
51
Table 41: Clock System Summary
Clock
Derived
From
Fixed Frequency or Range
Function
PLL_FAST=1
PLL_FAST=0
Controlled by
OSC
Crystal
32.768 kHz
Crystal clock
MCK
Crystal/PLL
19.660800 MHz
(600*CK32)
6.291456 MHz
(192*CK32)
PLL_FAST
Master clock
CKCE
MCK
4.9152 MHz
1.5728 MHz
CE clock
CKADC
MCK
4.9152 MHz,
2.4576 MHz
1.572864 MHz,
0.786432 MHz
ADC_DIV
ADC clock
CKMPU
MCK
4.9152 MHz …
307.2 kHz
1.572864 MHz…
98.304 kHz
MPU_DIV[2:0]
MPU clock
CKICE
MCK
9.8304 MHz…
614.4 kHz
3.145728 MHz …
196.608 kHz
MPU_DIV[2:0]
ICE clock
CKOPTMOD
MCK
38.40 kHz
38.6 kHz
Optical
UART
Modulation
CK32
MCK
32.768 kHz
32 kHz clock
2.5.4
Real-Time Clock (RTC)
2.5.4.1 RTC General Description
The RTC is driven directly by the crystal oscillator and is powered by either the V3P3SYS pin or the
VBAT_RTC pin, depending on the V3OK internal bit. The RTC consists of a counter chain and output
registers. The counter chain consists of registers for seconds, minutes, hours, day of week, day of
month, month, and year. The chain registers are supported by a shadow register that facilitates read
and write operations.
Table 42 shows the I/O RAM registers for accessing the RTC.
2.5.4.2 Accessing the RTC
Two bits, RTC_RD (I/O RAM 0x2890[6]) and RTC_WR (I/O RAM 0x2890[7]), control the behavior of the
shadow register.
When RTC_RD is low, the shadow register is updated by the RTC after each two milliseconds. When
RTC_RD is high, this update is halted and the shadow register contents become stationary and are suitable
to be read by the MPU. Thus, when the MPU wishes to read the RTC, it freezes the shadow register by
setting the RTC_RD bit, reads the shadow register, and then lowers the RTC_RD bit to let updates to the
shadow register resume. Since the RTC clock is only 500Hz, there may be a delay of approximately 2 ms
from when the RTC_RD bit is lowered until the shadow register receives its first update. Reads to RTC_RD
continue to return a one until the first shadow update occurs.
When RTC_WR is high, the update of the shadow register is also inhibited. During this time, the MPU may
overwrite the contents of the shadow register. When RTC_WR is lowered, the shadow register is written into
the RTC counter on the next 500Hz RTC clock. A change bit is included for each word in the shadow
register to ensure that only programmed words are updated when the MPU writes a zero to RTC_WR.
Reads of RTC_WR returns one until the counter has actually been updated by the register.
The sub-second register of the RTC, RTC_SBSC (I/O RAM 0x2892), can be read by the MPU after the one
second interrupt and before reaching the next one second boundary. The RTC_SBSC register is expressed
as a count of 1/128 second periods remaining until the next one second boundary. Writing 0x00 to
RTC_SBSC resets the counter re-starting the count from 0 to 127. Reading and resetting the sub-second
counter can be used as part of an algorithm to accurately set the RTC.
The RTC is capable of processing leap years. Each counter has its own output register. The RTC chain
registers are not affected by the reset pin, watchdog timer resets, or by transitions between the battery
modes and mission mode.
相關(guān)PDF資料
PDF描述
71M6541D-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP64
71M6542G-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6541G-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP64
71M6541F-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP64
71M6543F-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
71M6542FT-IGT/F 制造商:Maxim Integrated Products 功能描述:1-PHASE SOC 128KB WITH PREC TEMP SENSOR - Rail/Tube
71M6542FT-IGTR/F 制造商:Maxim Integrated Products 功能描述:1-PHASE SOC, 64KB FLASH, PRES TEMP SENSOR - Tape and Reel
71M6542G 制造商:未知廠家 制造商全稱:未知廠家 功能描述:71M6541D/71M6541F/71M6541G/71M6542F/71M6542G 是 TeridianTM 的第4 代高集成度單相電表SoC
71M6542G-IGT/F 功能描述:計(jì)量片上系統(tǒng) - SoC 1-Phase Metering SOC with 128KB Flash RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6542G-IGTR/F 制造商:Maxim Integrated Products 功能描述:- Tape and Reel