參數(shù)資料
型號: 70824L25PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: SRAM
英文描述: 4K X 16 STANDARD SRAM, 25 ns, PQFP80
封裝: TQFP-80
文件頁數(shù): 6/21頁
文件大?。?/td> 191K
代理商: 70824L25PF
14
IDT70824S/L
High-Speed 4K x 16 Sequential Access Random Access Memory
Military and Commercial Temperature Ranges
Sequential Port: AC Electrical Characteristics Over
the Operating Temperature and Supply Voltage Range(1,3)
Sequential Port: AC Electrical Characteristics
Over the Operating Temperature and Supply Voltage(1,3)
NOTES:
1. 'X' in part number indicates power rating (S or L).
2. Transition measured at 0mV from steady state. This parameter is guaranteed with the AC Output Test Load (Figure 1) by device characterization, but is not
production tested.
3. Industrial temperature: for specific speeds, packages and powers contact your sales office.
70824X20
Com'l Only
70824X25
Com'l Only
70824X35
Com'l &
Military
70824X45
Com'l &
Military
Unit
Symbol
Parameter
Min.Max.Min.Max.Min.Max.Min.Max.
READ CYCLE
tCYC
Sequential Clock Cycle Time
25
____
30
____
40
____
50
____
ns
tCH
Clock Pulse HIGH
10
____
12
____
15
____
18
____
ns
tCL
Clock Pulse LOW
10
____
12
____
15
____
18
____
ns
tES
Count Enab le and Address Pointer Set-up Time
5
____
5
____
6
____
6
____
ns
tEH
Count Enable and Address Pointer Hold Time
2
____
2
____
2
____
2
____
ns
tSOE
Output Enable to Data Valid
____
8
____
10
____
15
____
20
ns
tOLZ
Output Enable Low-Z Time(2)
2
____
2
____
2
____
2
____
ns
tOHZ
Output Enable High-Z Time(2)
____
9
____
11
____
15
____
15
ns
tCD
Clock to Valid Data
____
20
____
25
____
35
____
45
ns
tCKHZ
Clock High-Z Time(2)
____
12
____
14
____
17
____
20
ns
tCKLZ
Clock Low-Z Time(2)
3
____
3
____
3
____
3
____
ns
tEB
Clock to
EOB
____
13
____
15
____
18
____
23
ns
3099 tbl 22
Symbol
Parameter
70824X20
Com'l Only
70824X25
Com'l Only
70824X35
Com'l &
Military
70824X45
Com'l &
Military
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
WRITE CYCLE
tCYC
Sequential Clock Cycle Time
25
____
30
____
40
____
50
____
ns
tFS
Flow Restart Time
13
____
15
____
20
____
20
____
ns
tWS
Chip Select and Read/Write Set-up Time
5
____
5
____
6
____
6
____
ns
tWH
Chip Select and Read/Write Hold Time
2
____
2
____
2
____
2
____
ns
tDS
Input Data Set-up Time
5
____
5
____
6
____
6
____
ns
tDH
Input Data Hold Time
2
____
2
____
2
____
2
____
ns
3099 tbl 23
相關(guān)PDF資料
PDF描述
70824L35PFI 4K X 16 STANDARD SRAM, 35 ns, PQFP80
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