參數(shù)資料
型號： 68HC05M68HC
廠商： Motorola, Inc.
英文描述： HCMOS Microcontroller Unit
中文描述： HCMOS微控制器
文件頁數(shù)： 61/130頁
文件大小： 1541K
代理商： 68HC05M68HC
Serial Input/Output Port (SIOP)
SIOP Signal Format
MC68HC705P6A
—
Rev. 2.0
Advance Information
MOTOROLA
Serial Input/Output Port (SIOP)
61
Figure 7-2. SIOP Timing Diagram
7.3.2 Serial Data Input (SDI)
The SDI pin becomes an input as soon as the SIOP subsystem is
enabled. New data may be presented to the SDI pin on the falling edge
of SCK.However, valid data must be present at least 100 nanoseconds
before the rising edge of SCK and remain valid for 100 nanoseconds
after the rising edge of SCK. See
Figure 7-2
.
7.3.3 Serial Data Output (SDO)
The SDO pin becomes an output as soon as the SIOP subsystem is
enabled. Prior to enabling the SIOP, PB5 can be initialized to determine
the beginning state. While the SIOP is enabled, PB5 cannot be used as
a standard output since that pin is connected to the last stage of the
SIOP serial shift register. Mask option register bit LSBF permits data to
be transmitted in either the MSB first format or the LSB first format. Refer
to
11.3 Mask Option Register
for MOR LSBF programming information.
On the first falling edge of SCK, the first data bit will be shifted out to the
SDO pin. The remaining data bits will be shifted out to the SDO pin on
subsequent falling edges of SCK. The SDO pin will present valid data at
least 100 nanoseconds before the rising edge of the SCK and remain
valid for 100 nanoseconds after the rising edge of SCK. See
Figure 7-2
.
SCK
SDO
SDI
100 ns
100 ns
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
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