參數(shù)資料
型號(hào): 68HC05M68HC
廠商: Motorola, Inc.
英文描述: HCMOS Microcontroller Unit
中文描述: HCMOS微控制器
文件頁(yè)數(shù): 54/130頁(yè)
文件大小: 1541K
代理商: 68HC05M68HC
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)當(dāng)前第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)
Input/Output Ports
Advance Information
MC68HC705P6A
Rev. 2.0
54
Input/Output Ports
MOTOROLA
6.5 Port C
Port C is an 8-bit bidirectional port which can share pins PC3
PC7 with
the A/D subsystem. The port C data register is located at address $0002
and its data direction register (DDR) is located at address $0006. The
contents of the port C data register are indeterminate at initial powerup
and must be initialized by user software. Reset does not affect the data
registers, but clears the DDRs, thereby setting all of the port pins to input
mode. Writing a 1 to a DDR bit sets the corresponding port pin to output
mode (see
Figure 6-3
).
Port C may be used for general I/O applications when the A/D
subsystem is disabled. The ADON bit in register ADSC is used to
enable/disable the A/D subsystem. Care must be exercised when using
pins PC0
PC2 while the A/D subsystem is enabled. Accidental changes
to bits that affect pins PC3
PC7 in the data or DDR registers will produce
unpredictable results in the A/D subsystem. See
Section 9. Analog
Subsystem
.
Figure 6-3. Port C I/O Circuitry
READ $0002
WRITE $0002
READ $0006
DATA
REGISTER BIT
I/O
PIN
OUTPUT
INTERNAL HC05
DATA BUS
RESET
(RST)
WRITE $0006
DATA DIRECTION
REGISTER BIT
相關(guān)PDF資料
PDF描述
68HC070KH12 8 BIT MICROCONTROLLER UNITS
68HC08KH12 8 BIT MICROCONTROLLER UNITS
68HC08M68HC HCMOS Microcontroller Unit
68HC11 Technical Data
68HC12 Advance Information
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
68HC05P4A 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release)
68HC05P4A_1 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release)
68HC05P5 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:SPECIFICATION(General Release)
68HC05P9A 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:SPECIFICATION(General Release)
68HC05P9A_1 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:SPECIFICATION(General Release)