- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366254 > 68HC05M68HC (Motorola, Inc.) HCMOS Microcontroller Unit PDF資料下載
參數(shù)資料
| 型號： | 68HC05M68HC |
| 廠商： | Motorola, Inc. |
| 英文描述： | HCMOS Microcontroller Unit |
| 中文描述： | HCMOS微控制器 |
| 文件頁數(shù)： | 25/130頁 |
| 文件大?。?/td> | 1541K |
| 代理商： | 68HC05M68HC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁
General Description
Functional Pin Description
MC68HC705P6A
—
Rev. 2.0
Advance Information
MOTOROLA
General Description
25
1.4.7 PD5 and PD7/TCAP
These two I/O pins comprise port D and one of them is shared with the
16-bit timer subsystem. The state of PD5 is software programmable and
is configured as an input during power-on or reset. PD7 is always an
input. It may be read at any time, regardless of which mode of operation
the 16-bit timer is in. Refer to
Section 6. Input/Output Ports
and
Section 8. Capture/Compare Timer
.
1.4.8 TCMP
This pin is the output from the 16-bit timer
’
s output compare function. It
is low after reset. Refer to
Section 8. Capture/Compare Timer
.
1.4.9 IRQ/V
PP
(Maskable Interrupt Request)
This input pin drives the asynchronous interrupt function of the MCU in
user mode and provides the V
PP
programming voltage in bootloader
mode. The MCU will complete the current instruction being executed
before it responds to the IRQ interrupt request. When the IRQ/V
PP
pin is
driven low, the event is latched internally to signify an interrupt has been
requested. When the MCU completes its current instruction, the interrupt
latch is tested. If the interrupt latch is set and the interrupt mask bit (I bit)
in the condition code register is clear, the MCU will begin the interrupt
sequence.
Depending on the MOR LEVEL bit, the IRQ/V
PP
pin will trigger an
interrupt on either a negative edge at the IRQ/V
PP
pin and/or while the
IRQ/V
PP
pin is held in the low state. In either case, the IRQ/V
PP
pin must
be held low for at least one t
ILIH
time period. If the edge- and level-
sensitive mode is selected (LEVEL bit set), the IRQ/V
PP
input pin
requires an external resistor connected to V
DD
for wired-OR operation.
If the IRQ/V
PP
pin is not used, it must be tied to the V
DD
supply. The
IRQ/V
PP
pin input circuitry contains an internal Schmitt trigger to improve
noise immunity. Refer to
Section 5. Interrupts
.
NOTE:
If the voltage level applied to the IRQ/V
PP
pin exceeds V
DD
, it may affect
the MCU
’
s mode of operation. See
Section 3. Operating Modes
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 68HC070KH12 | 8 BIT MICROCONTROLLER UNITS |
| 68HC08KH12 | 8 BIT MICROCONTROLLER UNITS |
| 68HC08M68HC | HCMOS Microcontroller Unit |
| 68HC11 | Technical Data |
| 68HC12 | Advance Information |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 68HC05P4A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC05P4A_1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC05P5 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION(General Release) |
| 68HC05P9A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION(General Release) |
| 68HC05P9A_1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION(General Release) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。