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參數(shù)資料
| 型號(hào)： | 403GC-3BA33C1 |
| 元件分類： | 復(fù)位半導(dǎo)體 |
| 英文描述： | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 中文描述： | 32位微處理器 |
| 文件頁數(shù)： | 12/48頁 |
| 文件大小： | 768K |
| 代理商： | 403GC-3BA33C1 |
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IBM PowerPC 403GC
12
DSR/CTS
28
J2
I
Data Set Ready / Clear to Send. The function of this pin as either
DSR or CTS is selectable via the Serial Port Configuration bit in the
IOCR.
DTR/RTS
88
L14
O
Data Terminal Ready / Request to Send. The function of this pin as
either DTR or RTS is selectable via the Serial Port Configuration bit
in the IOCR.
EOT0/TC0
128 A11
I/O
End of Transfer 0 / Terminal Count 0. The function of the EOT0/TC0
is controlled via the EOT/TC bit in the DMA Channel 0 Control Reg-
ister. When EOT0/TC0 is configured as an End of Transfer pin,
external users may stop a DMA transfer by placing a logic 0 on this
input pin. When configured as a Terminal Count pin, the 403GC sig-
nals the completion of a DMA transfer by placing a logic 0 on this
pin.
EOT1/TC1
131 A10
I/O
End of Transfer 1 / Terminal Count 1. See description of EOT0/TC0.
EOT2/TC2
132 C10
I/O
End of Transfer 2 / Terminal Count 2. See description of EOT0/TC0.
EOT3/TC3/
XSize0
133 D10
I/O
End of Transfer 3 / Terminal Count 3 / External Master Transfer Size
0. When the 403GC is bus master, this pin has the same function as
EOT0/TC0.
When the 403GC is not bus master, EOT3/TC3/XSize0 is used as
one of two external transfer size input bits, XSize0:1.
Error
136 C9
O
System Error. Error goes to a logic 1 whenever a machine check
error is detected in the 403GC. The Error pin then remains a logic 1
until the machine check error is cleared in the Exception Syndrome
Register and/or Bus Error Syndrome Register.
GND
1
G7
Ground. All ground pins must be used.
10
E2
Ground. All ground pins must be used.
15
F1
Ground. All ground pins must be used.
29
J4
Ground. All ground pins must be used.
30
K1
Ground. All ground pins must be used.
41
H7
Ground. All ground pins must be used.
50
N5
Ground. All ground pins must be used.
59
P7
Ground. All ground pins must be used.
60
L7
Ground. All ground pins must be used.
70
P10
Ground. All ground pins must be used.
81
H8
Ground. All ground pins must be used.
Table 4. 403GC Signal Descriptions
Signal
Name
Pin
Ball
I/O
Type
Function
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 403GC-3BA40C1 | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 403GCX-3BC50C2 | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 403GCX-3BC66C2 | 32-Bit Microprocessor |
| 403GCX-3BC80C2 | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 403GCX-3BC80C2A | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 403GC-3BA40C1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| 403GCX2JC66C2 | 制造商:IBM 功能描述:38R2233 |
| 403GCX-3BC50C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| 403GCX-3BC66C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| 403GCX-3BC80C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
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