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參數(shù)資料
| 型號： | 38C1 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | DIODE ZENER SINGLE 200mW 24Vz 0.05mA-Izt 0.05 0.05uA-Ir 18.2 SOD-323 3K/REEL |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 43/59頁 |
| 文件大小： | 1063K |
| 代理商： | 38C1 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C1 Group
43
NOTES ON USE
V
L3
pin
When LCD drive control circuit is not used, connect V
L3
to V
CC
.
Countermeasures against noise
(1) Shortest wiring length
Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin
as short as possible. Especially, connect a capacitor across the
RESET pin and the V
SS
pin with the shortest possible wiring
(within 20mm).
G
Reason
The width of a pulse input into the RESET pin is determined by
the timing necessary conditions. If noise having a shorter pulse
width than the standard is input to the RESET pin, the reset is
released before the internal state of the microcomputer is com-
pletely initialized. This may cause a program runaway.
Fig. 45 Wiring for clock I/O pins
(2) Connection of bypass capacitor across V
SS
line and V
CC
line
In order to stabilize the system operation and avoid the latch-up,
connect an approximately 0.1
μ
F bypass capacitor across the V
SS
line and the V
CC
line as follows:
Connect a bypass capacitor across the V
SS
pin and the V
CC
pin
at equal length.
Connect a bypass capacitor across the V
SS
pin and the V
CC
pin
with the shortest possible wiring.
Use lines with a larger diameter than other signal lines for V
SS
line and V
CC
line.
Connect the power source wiring via a bypass capacitor to the
V
SS
pin and the V
CC
pin.
Fig. 44 Wiring for the RESET pin
Wiring for clock input/output pins
Make the length of wiring which is connected to clock I/O pins
as short as possible.
Make the length of wiring (within 20 mm) across the grounding
lead of a capacitor which is connected to an oscillator and the
V
SS
pin of a microcomputer as short as possible.
Separate the V
SS
pattern only for oscillation from other V
SS
patterns.
G
Reason
If noise enters clock I/O pins, clock waveforms may be de-
formed. This may cause a program failure or program runaway.
Also, if a potential difference is caused by the noise between
the V
SS
level of a microcomputer and the V
SS
level of an oscil-
lator, the correct clock will not be input in the microcomputer.
Fig. 46 Bypass capacitor across the V
SS
line and the V
CC
line
RESET
Reset
circuit
Noise
V
SS
V
SS
Reset
circuit
V
SS
RESET
V
SS
N.G.
O.K.
Noise
X
IN
X
OUT
V
SS
X
IN
X
OUT
V
SS
N.G.
O.K.
V
SS
V
CC
AA
AA
AA
AA
AA
V
SS
V
CC
AA
AA
AA
AA
AA
N.G.
O.K.
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