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| 型號： | 38C1 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | DIODE ZENER SINGLE 200mW 24Vz 0.05mA-Izt 0.05 0.05uA-Ir 18.2 SOD-323 3K/REEL |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 24/59頁 |
| 文件大?。?/td> | 1063K |
| 代理商： | 38C1 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C1 Group
24
Timer 1, Timer 2, Timer 3
Timer 1, timer 2, and timer 3 are 8-bit timers. The count source for
each timer can be selected by timer 123 mode register. The timer
latch value is not affected by a change of the count source. How-
ever, because changing the count source may cause an inadvert-
ent count down of the timer. Therefore, rewrite the value of timer
whenever the count source is changed.
G
Timer 2 Write Control
If the timer 2 write control bit is
“
0
”
, when the value is written in the
address of timer 2, the value is loaded in the timer 2 and the latch
at the same time.
If the timer 2 write control bit is
“
1
”
, when the value is written in the
address of timer 2, the value is loaded only in the latch. The value
in the latch is loaded in timer 2 after timer 2 underflows.
G
Timer 2 Output Control
When the timer 2 (T
OUT
) is output enabled, an inversion signal
from pin T
OUT
is output each time timer 2 underflows.
In this case, set the port P6
2
shared with the port T
OUT
to the out-
put mode.
I
Note on Timer 1 to Timer 3
When the count source of timers 1 to 3 is changed, the timer
counting value may be changed large because a thin pulse is gen-
erated in count input of timer. If timer 1 output is selected as the
count source of timer 2 or timer 3, when timer 1 is written, the
counting value of timer 2 or timer 3 may be changed large be-
cause a thin pulse is generated in timer 1 output.
Therefore, set the value of timer in the order of timer 1, timer 2
and timer 3 after the count source selection of timer 1 to 3.
Fig. 21 Structure of timer 123 mode register
T
O
U
U
T
:
:
T
:
:
e
:
:
m
0
:
1
:
i
m
0
1
T
i
m
0
1
N
o
o
u
t
a
t
a
o
u
T
O
T
O
r
2
W
W
e
r
T
φ
S
e
r
:
T
:
f
(
e
r
:
φ
S
:
f
(
t
u
s
t
r
r
t
U
U
r
i
r
i
2
i
m
O
3
i
m
X
I
1
O
X
C
e
p
t
t
p
T
T
w
t
e
t
e
c
e
U
c
e
N
)
c
U
I
d
u
a
a
u
o
o
r
o
r
R
o
r
/
o
R
N
)
(
t
a
“
“
c
u
u
t
e
d
a
d
a
u
n
1
C
u
n
1
1
6
u
n
C
c
H
L
o
p
p
c
t
a
t
a
t
o
1
t
o
t
i
v
o
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t
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t
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t
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i
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u
t
6
s
o
u
t
e
o
e
t
t
p
l
i
s
n
r
o
l
a
n
l
u
r
p
u
d
p
u
b
a
a
l
t
c
t
c
c
e
t
g
u
t
i
t
b
b
b
h
h
e
t
s
w
i
t
c
h
b
i
t
0
1
S
S
t
t
”
”
u
u
r
o
d
e
n
t
n
T
O
t
0
1
i
m
0
1
i
t
t
l
e
i
t
s
e
d
d
l
T
i
a
o
e
n
n
l
e
d
l
y
c
c
o
u
n
t
e
r
a
T
t
i
o
n
b
i
t
(
N
o
t
e
)
E
/
T
u
u
r
c
t
e
s
e
l
e
c
t
i
o
n
b
i
t
p
t
s
6
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
(
N
o
t
e
)
E
/
1
D
o
n
o
t
w
r
i
t
e
“
1
”
t
o
t
h
e
s
e
b
i
t
s
.
)
T
(
i
T
m
e
2
r
3
M
1
2
3
:
a
d
m
d
o
r
d
e
e
s
r
e
0
g
0
i
2
s
t
e
r
6
,
1
s
9
1
i
n
i
t
i
a
l
v
a
l
u
e
:
0
0
1
6
)
Note:
φ
SOURCE
represents the oscillation frequency of
X
IN
input in the middle- and high-speed mode,
built-in ring oscillator in the ring oscillator mode,
and sub-clock in the low-speed mode.
b7
b0
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