參數(shù)資料
型號(hào)： 29LV800BE
廠商： Fujitsu Limited
英文描述： 8M (1M x 8/512 K x 16) BIT
中文描述： 8米（3米x五百一十二分之八畝× 16）位
文件頁(yè)數(shù)： 19/58頁(yè)
文件大小： 292K
代理商： 29LV800BE
MBM29LV800TE/BE
60/70/90
18
Extended Sector Protection
In addition to normal sector protection, the MBM29LV800TE/BE have Extended Sector Protection as extended
function. This function enables to protect sector by forcing V
ID
on RESET pin and write a commnad sequence.
Unlike conventional procedure, it is not necessary to force V
ID
and control timing for control pins. The only RESET
pin requires V
ID
for sector protection in this mode. The extended sector protect requires V
ID
on RESET pin. With
this condition the operation is initiated by writing the set-up command (60h) into the command register. Then
the sector addresses pins (A
18
, A
17
, A
16
, A
15
, A
14
, A
13
and A
12
) and (A
6
, A
1
, A
0
)
=
(0, 1, 0) should be set to be
protected (recommend to set V
IL
for the other addresses pins) , and write extended sector protect command
(60h) . A sector is generally protected in 250
μ
s. To verify programming of the protection circuitry, the sector
addresses pins (A
18
, A
17
, A
16
, A
15
, A
14
, A
13
and A
12
) and (A
6
, A
1
, A
0
)
=
(0, 1, 0) should be set and write a command
(40h) . Following the command write, a logical “1” at device output DQ
0
produces for protected sector in the read
operation. If the output is logical “0”, repeat to write extended sector protect command (60h) again. To terminate
the operation, it is necessary to set RESET pin to V
IH
(refer to “Extended Sector Protection Algorithm” in
“
I
FLOW CHART”) .
RESET
Hardware Reset
The MBM29LV800TE/BE devices may be reset by driving the RESET pin to V
IL
. The RESET pin has pulse
requirement and has to be kept low (V
IL
) for at least “t
RP
” in order to properly reset the internal state machine.
Any operation in the process of being executed is terminated and the internal state machine is reset to the read
mode “t
READY
” after the RESET pin goes low. Furthermore once the RESET pin goes high, the devices require
an additional t
RH
before it will allow read access. When the RESET pin is low, the devices will be in the standby
mode for the duration of the pulse and all the data output pins will be tri-stated. If hardware reset occurs during
program or erase operation, the data at that particular location is corrupted. Note that the RY/BY output signal
should be ignored during the RESET pulse. See “RESET, RY/BY Timing Diagram” in “
I
TIMING DIAGRAM”
for the timing diagram. Refer to Temporary Sector Unprotection for additional functionality.
If hardware reset occurs during Embedded Erase Algorithm, the erasing sector (s) cannot be used.
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