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參數(shù)資料
| 型號(hào)： | 28F640P3 |
| 廠商： | Intel Corp. |
| 英文描述： | Intel StrataFlash Embedded Memory |
| 中文描述： | 英特爾StrataFlash嵌入式存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 16/82頁(yè) |
| 文件大?。?/td> | 749K |
| 代理商： | 28F640P3 |
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28F6408W30, 28F3204W30, 28F320W30, 28F640W30
10
Preliminary
Confirm command is given to partition X, then the command will be executed, and a block in
partition X will be erased. Alternatively, if the Erase Confirm command is given to partition Y, the
command will still be executed, and a block in partition Y will be erased. Any other command
given to ANY partition prior to the Erase Confirm command will result in a command sequence
error, which is posted in the status register. After the erase has successfully started in partition X or
Y, read cycles can occur in any other partition.
Table 4. Command Code and Descriptions (Sheet 1 of 2)
M
Instruction
Code
FFh
Command
Description
R
Read Array
Read Status
Register
Read ID Register,
Read Configuration
Register
Read Query
Register
Clear Status
Register
Places addressed partition in read array mode.
Places addressed partition in read status register mode. A partition automatically enters the
read status register mode after a valid Program/Erase command is executed.
Puts the addressed partition in read device identifier mode. The device outputs
manufacturer and device ID codes, configuration register settings, block lock status and
protection register data. Data is output on DQ
15-0
.
Puts the addressed partition in read query mode. The device outputs Common Flash
Interface (CFI) information on DQ
7-0
.
70h
90h
98h
50h
Clears status register bits 1, 3, 4 and 5. The WSM can set (1) and reset (0) bits 0, 2, 6 and 7.
P
40h
Word Program
Setup
The preferred first bus cycle program command that prepares the WSM for a program
operation. The second bus cycle command latches the address and data. A Read Array
command is required to read array data after programming.
10h
Alternate Word
Program Setup
Enhanced Factory
Programming
Setup
Enhanced Factory
Programming
Confirm
Equivalent to a Word Program Setup command (40h).
30h
Activates Enhanced Factory Programming mode (EFP). The first bus cycle sets up the
command. If the second bus cycle is a Confirm command (D0h), subsequent writes provide
program data. All other commands are ignored once EFP mode begins.
D0h
If the first command was Enhanced Factory Programming Setup (30h), the CUI latches the
address, confirms command data, and prepares the device for EFP mode.
E
20h
Block Erase Setup
Prepares the WSM for a block erase operation. The device erases the block addressed by
the Erase Confirm command. If the next command is not Erase Confirm, the CUI
(a) sets status register bits SR.4 and SR.5 to
“
1,
”
(b) places the partition in the read status register mode
(c) waits for another command.
If the first command was Erase Setup (20h), the WSM latches address and data and erases
the block indicated by the erase confirm cycle address. During program/erase, the partition
responds only to Read Status Register, Program Suspend, and Erase Suspend commands.
CE# or OE# toggle updates status register data.
This command issued at any device address initiates suspension of the currently executing
program/erase operation. The status register, invoked by a Read Status Register command,
indicates successful operation suspension by setting (1) status bits SR.2 (program suspend)
or SR.6 (erase suspend) and SR.7. The WSM remains in the suspend mode regardless of
control signal states, except RST# = V
IL
.
This command issued at any device address resumes suspended program or erase
operation.
Prepares the WSM lock configuration. If the next command is not Block-Lock, Unlock, or
Lock-Down the WSM sets SR.4 and SR.5 to indicate command sequence error.
If the previous command was Lock Setup (60h), the CUI locks the addressed block.
After a Lock Setup (60h) command the CUI latches the address and unlocks the addressed
block. If previously Locked-down, the operation has no effect.
After a Lock Setup (60h) command, the CUI latches the address and locks-down the
addressed block.
D0h
Erase Confirm
S
B0h
Program or
Erase Suspend
D0h
Suspend Resume
B
60h
Lock Setup
01h
Lock Block
D0h
Unlock Block
2Fh
Lock-Down
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F320C3 | 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器) |
| 28F800C3 | 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器) |
| 28F160C3 | 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器) |
| 28F320D18 | 1.8 Volt Intel Dual-Plane Flash Memory(1.8 V Intel 雙平面閃速存儲(chǔ)器) |
| 28F320J5 | 5 Volt Intel StrataFlash Memory(5 V 32M位英特爾StrataFlash存儲(chǔ)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F640W30 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30) |
| 28F650 | 制造商:Cinch Connectors 功能描述:1 Lug Terminal Strip |
| 28F651 | 制造商:Cinch Connectors 功能描述:2 Lug Terminal Strip |
| 28F652 | 制造商:Cinch Connectors 功能描述:3 Lug Terminal Strip |
| 28F653 | 制造商:Cinch Connectors 功能描述:4 Lug Terminal Strip |
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