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參數(shù)資料
| 型號(hào)： | 28F320S5 |
| 廠商： | Intel Corp. |
| 英文描述： | 3 V、32MB FlashFile Memory(3 V、32M位FlashFile 存儲(chǔ)器) |
| 中文描述： | 3伏，32MB的FlashFile內(nèi)存（3伏，32位FlashFile存儲(chǔ)器） |
| 文件頁數(shù)： | 24/51頁 |
| 文件大小： | 320K |
| 代理商： | 28F320S5 |
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28F160S5/28F320S5
E
24
PRELIMINARY
Table 11. Primary-Vendor Specific Extended Query
(Continued)
Offset
Length
(bytes)
Description
Data
(P+C)h
01h
V
CC
Logic Supply Optimum Program/Erase voltage
(highest performance)
bits 7
–4
bits 3–0
BCD value in volts
BCD value in 100 mv
3D:
0050h
(P+D)h
01h
V
PP
[Programming] Supply Optimum Program/Erase
voltage
bits 7–4
bits 3–0
HEX value in volts
BCD value in 100 mv
3E:
0050h
(P+E)h
reserved
Reserved for future use
Table 12. Identifier Codes
Code
Address
(2)
000000
000001
000001
X
0002
(1)
Data
B0
D0
D4
Manufacturer Code
Device Code
16 Mbit
32 Mbit
Block Lock Configuration
Block Is Unlocked
Block Is Locked
Reserved for Future Use
Block Erase Status
Last erase completed
successfully
Last erase did not
complete successfully
Reserved for Future Use
NOTES:
1.
X selects the specific block lock configuration code.
See Figure 5 for the device identifier code memory
map.
2.
A
should be ignored in this address. The lowest order
address line is A
1
in both word and byte mode.
DQ
0
= 0
DQ
0
= 1
DQ
2
–7
x0002
(1)
DQ
1
= 0
DQ
1
= 1
DQ
2–7
4.3
Read Identifier Codes
Command
The identifier code operation is initiated by writing
the Read Identifier Codes command. Following the
command write, read cycles from addresses shown
in Figure 5 retrieve the manufacturer, device, block
lock configuration, and block erase status codes
(see Table 12 for identifier code values). To
terminate the operation, write another valid
command. Like the Read Array command, the
Read
Identifier
Codes
independently of the V
voltage. Following the
Read Identifier Codes command, the information in
Table 12 can be read.
command
functions
4.4
Read Status Register
Command
The status register may be read to determine when
programming,
block
configuration is complete and whether the operation
completed successfully. It may be read at any time
by writing the Read Status Register command.
After writing this command, all subsequent read
operations output data from the status register until
another valid command is written. The status
register contents are latched on the falling edge of
OE#, CE
0
#, or CE
1
# whichever occurs last. OE# or
CE
X
# must toggle to V
IH
to update the status
register latch. The Read Status Register command
functions independently of the V
PP
voltage.
erasure,
or
lock-bit
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