- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄371435 > 28F320J3A (Intel Corp.) 3 Volt Intel StrataFlash Memory(3 V 32M位英特爾StrataFlash存儲(chǔ)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | 28F320J3A |
| 廠商： | Intel Corp. |
| 英文描述： | 3 Volt Intel StrataFlash Memory(3 V 32M位英特爾StrataFlash存儲(chǔ)器) |
| 中文描述： | 3伏特英特爾StrataFlash存儲(chǔ)器（3伏32兆位英特爾的StrataFlash存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 33/58頁(yè) |
| 文件大小： | 574K |
| 代理商： | 28F320J3A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)當(dāng)前第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)
28F128J3A, 28F640J3A, 28F320J3A
PRODUCT PREVIEW
27
NOTE:
When the device is configured in one of the pulse modes, the STS pin pulses low with a typical pulse
width of 250 ns.
Table 17. Configuration Coding Definitions
Reserved
Pulse on
Program
Complete
(1)
Pulse on
Erase
Compete
(1)
bits 7—2
bit 1
bit 0
DQ
7–
DQ
2
= Reserved
DQ
1–
DQ
0
= STS Pin Configuration Codes
00 = default, level mode RY/BY#
(device ready) indication
01 = pulse on Erase complete
10 = pulse on Program complete
11 = pulse on Erase or Program Complete
Configuration Codes 01b, 10b, and 11b are all pulse mode
such that the STS pin pulses low then high when the
operation indicated by the given configuration is completed.
Configuration Command Sequences for STS pin
configuration (masking bits DQ
7–
DQ
2
to 00h) are as follows:
Default RY/BY# level mode: B8h, 00h
ER INT (Erase Interrupt): B8h, 01h
Pulse-on-Erase Complete
PR INT (Program Interrupt): B8h, 02h
Pulse-on-Program Complete
ER/PR INT (Erase or Program Interrupt): B8h, 03h
Pulse-on-Erase or Program Complete
DQ
7–
DQ
2
are reserved for future use.
default (DQ
DQ
= 00) RY/BY#, level mode
— used to control HOLD to a memory controller to prevent
accessing a flash memory subsystem while any flash device's
WSM is busy.
configuration 01 ER INT, pulse mode
— used to generate a system interrupt pulse when any flash
device in an array has completed a Block Erase or sequence of
Queued Block Erases. Helpful for reformatting blocks after file
system free space reclamation or “cleanup”
configuration 10 PR INT, pulse mode
— used to generate a system interrupt pulse when any flash
device in an array has complete a Program operation. Provides
highest performance for servicing continuous buffer write
operations.
configuration 11 ER/PR INT, pulse mode
— used to generate system interrupts to trigger servicing of flash
arrays when either erase or program operations are completed
when a common interrupt service routine is desired.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F640J3A | 3 Volt Intel StrataFlash Memory(3 V 64M位英特爾StrataFlash存儲(chǔ)器) |
| 28F128 | 3 Volt Intel StrataFlash Memory |
| 28F1602C3 | 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器) |
| 28F3204C3 | 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級(jí)堆芯片封裝存儲(chǔ)器) |
| 28F1604C3 | 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F320J3D75 | 制造商:undefined 功能描述: |
| 28F320J5 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT |
| 28F320J5_02 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory |
| 28F320S3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| 28F320S5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。