- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371435 > 28F320J3A (Intel Corp.) 3 Volt Intel StrataFlash Memory(3 V 32M位英特爾StrataFlash存儲(chǔ)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | 28F320J3A |
| 廠商： | Intel Corp. |
| 英文描述： | 3 Volt Intel StrataFlash Memory(3 V 32M位英特爾StrataFlash存儲(chǔ)器) |
| 中文描述： | 3伏特英特爾StrataFlash存儲(chǔ)器（3伏32兆位英特爾的StrataFlash存儲(chǔ)器） |
| 文件頁數(shù)： | 29/58頁 |
| 文件大小： | 574K |
| 代理商： | 28F320J3A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當(dāng)前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁
28F128J3A, 28F640J3A, 28F320J3A
PRODUCT PREVIEW
23
When program is complete, status register bit SR.4 should be checked. If a program error is
detected, the status register should be cleared. The internal WSM verify only detects errors for “1”s
that do not successfully program to “0”s. The CUI remains in read status register mode until it
receives another command.
Reliable byte/word programs can only occur when V
and V
are valid. If a byte/word program is
attempted while V
≤
V
, status register bits SR.4 and SR.3 will be set to “1.” Successful byte/
word programs require that the corresponding block lock-bit be cleared. If a byte/word program is
attempted when the corresponding block lock-bit is set, SR.1 and SR.4 will be set to “1.”
4.10
Program Suspend Command
The Program Suspend command allows program interruption to read data in other flash memory
locations. Once the programming process starts (either by initiating a write to buffer or byte/word
program operation), writing the Program Suspend command requests that the WSM suspend the
program sequence at a predetermined point in the algorithm. The device continues to output status
register data when read after the Program Suspend command is written. Polling status register bits
SR.7 can determine when the programming operation has been suspended. When SR.7 = 1, SR.2
should also be set to “1”, indicating that the device is in the program suspend mode. STS in level
RY/BY# mode will also transition to V
OH
. Specification t
WHRH1
defines the program suspend latency.
At this point, a Read Array command can be written to read data from locations other than that
which is suspended. The only other valid commands while programming is suspended are Read
Query, Read Status Register, Clear Status Register, Configure, and Program Resume. After a
Program Resume command is written, the WSM will continue the programming process. Status
register bits SR.2 and SR.7 will automatically clear and STS in RY/BY# mode will return to V
OL
.
After the Program Resume command is written, the device automatically outputs status register
data when read. V
must remain at V
and V
must remain at valid V
levels (the same V
and
V
CC
levels used for programming) while in program suspend mode. Refer to Figure 9 for the
Program Suspend/Resume Flowchart
.
4.11
Set Read Configuration Command
The Set Read Configuration command writes data to the read configuration register. This operation
is initiated by a two-cycle command sequence. Read configuration setup is written, followed by a
second write that specifies the data to be written to the read configuration register. This data is
placed on the address bus, A
, and is latched on the rising edge of CE
or WE# (whichever occurs
first). The read configuration data sets the device’s read configuration to either page-mode or
standard word/byte reads. The command functions independently of the applied V
PEN
voltage. After
executing this command, the device returns to read array mode.
4.11.1
READ CONFIGURATION
The device supports two asynchronous read configurations: standard word/byte reads or page-
mode reads. Bit RCR.16 in the read configuration register sets the read configuration. Standard
word/byte reading is the default read configuration state.
Parameter blocks, status register, and identifier only support standard word/byte single read
operations.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F640J3A | 3 Volt Intel StrataFlash Memory(3 V 64M位英特爾StrataFlash存儲(chǔ)器) |
| 28F128 | 3 Volt Intel StrataFlash Memory |
| 28F1602C3 | 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器) |
| 28F3204C3 | 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級(jí)堆芯片封裝存儲(chǔ)器) |
| 28F1604C3 | 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F320J3D75 | 制造商:undefined 功能描述: |
| 28F320J5 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT |
| 28F320J5_02 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory |
| 28F320S3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| 28F320S5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。