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參數(shù)資料
| 型號(hào)： | 28F320J3A |
| 廠商： | Intel Corp. |
| 英文描述： | 3 Volt Intel StrataFlash Memory(3 V 32M位英特爾StrataFlash存儲(chǔ)器) |
| 中文描述： | 3伏特英特爾StrataFlash存儲(chǔ)器（3伏32兆位英特爾的StrataFlash存儲(chǔ)器） |
| 文件頁數(shù)： | 25/58頁 |
| 文件大?。?/td> | 574K |
| 代理商： | 28F320J3A |
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28F128J3A, 28F640J3A, 28F320J3A
PRODUCT PREVIEW
19
NOTE:
1. The variable P is a pointer which is defined at CFI offset 15h.
NOTE:
1. The variable P is a pointer which is defined at CFI offset 15h.
4.3
Read Identifier Codes Command
The identifier code operation is initiated by writing the Read Identifier Codes command. Following
the command write, read cycles from addresses shown in Figure 5 retrieve the manufacturer,
device and block lock configuration codes (see Table 15 for identifier code values). Page-mode
reads are not supported in this read mode. To terminate the operation, write another valid
command. Like the Read Array command, the Read Identifier Codes command functions
independently of the V
voltage. This command is valid only when the WSM is off or the device
is suspended. Following the Read Identifier Codes command, the following information can be
read:
Table 13. Protection Register Information
Offset
(1)
P = 31h
Length
Description
(Optional Flash Features and Commands)
Number of Protection register fields in JEDEC ID space.
“00h,” indicates that 256 protection bytes are available
Protection Field 1: Protection Description
This field describes user-available One Time Programmable
(OTP) protection register bytes. Some are pre-programmed
with device-unique serial numbers. Others are user-
programmable. Bits 0-15 point to the protection register lock
byte, the section’s first byte. The following bytes are factory
pre-programmed and user-programmable.
bits 0-7 = Lock/bytes JEDEC-plane physical low address
bits 8-15 = Lock/bytes JEDEC-plane physical high address
bits 16-23 = “n” such that 2
= factory pre-programmed bytes
bits 24-31 = “n” such that 2
n
= user-programmable bytes
Add.
Hex
Code
Value
(P+E)h
1
3F:
--01
01
(P+F)h
(P+10)h
(P+11)h
(P+12)h
4
40:
--00
00h
Table 14. Burst Read Information
Offset
(1)
P = 31h
Length
Description
(Optional Flash Features and Commands)
Page Mode Read capability
bits 0–7 = “n” such that 2
n
HEX value represents the number
of read-page bytes. See offset 28h for device word width to
determine page-mode data output width. 00h indicates no
read page buffer.
Number of synchronous mode read configuration fields that
follow. 00h indicates no burst capability.
Reserved for future use
Add.
Hex
Code
Value
(P+13)h
1
44:
--03
8 byte
(P+14)h
1
45:
--00
0
(P+15)h
46:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F640J3A | 3 Volt Intel StrataFlash Memory(3 V 64M位英特爾StrataFlash存儲(chǔ)器) |
| 28F128 | 3 Volt Intel StrataFlash Memory |
| 28F1602C3 | 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器) |
| 28F3204C3 | 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級(jí)堆芯片封裝存儲(chǔ)器) |
| 28F1604C3 | 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F320J3D75 | 制造商:undefined 功能描述: |
| 28F320J5 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT |
| 28F320J5_02 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory |
| 28F320S3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| 28F320S5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
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