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英文描述: SDRAM Performance Monitors with the ?lan?SC520 Microcontroller? 233KB (PDF)
中文描述: SDRAM的性能監(jiān)視器的?蘭?SC520微控制器? 233KB(PDF格式)
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代理商: 23380A
SDRAM Performance Monitors with the élanSC520 Microcontroller Application Note
A-1
Appendix A
SDRAM Performance Monitor Registers
The synchronous DRAM controller, which includes the write buffer and read buffer, contains two performance
monitor resources. These performance monitors are designed using an adaptive digital element (ADDIE). Any of
the following ADDIE monitors can be used to monitor the following parameters: SDRAM page misses, write buffer
hits, write buffer full, write buffer read merge hits and read buffer hits.
Table 2 shows the performance monitor registers.
Table 2.
Performance Monitor Registers with MMCR Offsets
Register Name
Performance Monitor Control
Performance Monitor Data 0
Performance Monitor Data 1
MMCR Offset
44h
48h
49h
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