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| 型號： | 23380A |
| 英文描述： | SDRAM Performance Monitors with the ?lan?SC520 Microcontroller? 233KB (PDF) |
| 中文描述： | SDRAM的性能監(jiān)視器的？蘭？SC520微控制器？ 233KB（PDF格式） |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 233K |
| 代理商： | 23380A |
SDRAM Performance Monitors with the élanSC520 Microcontroller Application Note
13
Figure 7.
Random Number Generator
SHARING AN ADDIE
An ADDIE is not required to be allocated to each
parameter being measured. A more practical system
uses a single ADDIE that feeds a bit stream via an input
multiplexer. This enables a single parameter to be
selected for measurement shown in Figure 8.
Figure 8.
System Block Diagram
The register-controlling parameter selection and the
ADDIE counter should be accessible by the processor;
they might be mapped into a register, I/O, or memory
address space. Additionally, these registers should be
accessible from the on-chip software development port
(SDP). Via the SDP, a host computer can connect with
a target system and unobtrusively examine perfor-
mance parameters. An instrument is not required for
the target system’s application or operating system
software, and an interrupt handler is not required.
After setting the select register, an 8-bit ADDIE
requires that about 500 or more samples be gathered
before the ADDIE is assumed to have tracked the new
input data stream. To assist with this, a sample counter
is used and is reset when the register selecting
parameter input is updated. The sample counter is
examined via the SDP before accessing the ADDIE
counter.
Least Significant Bit
Shift Clock
NOT
XOR
1
3
31
Shift Direction
Input
Sample Counter
ADDIE
Multiplexor
On-Chip Software
Development Port (SDP)
Select
Multiple
Performance
Parameters
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