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| 型號： | 21084 |
| 英文描述： | AMD-K6 Processor Bios Design Application Note AMD-K6 Processor I/O Model Application Note |
| 中文描述： | 的AMD - K6處理器的BIOS設(shè)計中的應(yīng)用注意的AMD - K6處理器的I / O模型的應(yīng)用說明 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 357K |
| 代理商： | 21084 |
21084D/0—June 1999
AMD-K6
Processor I/O Model
Introduction
1
Application Note
AMD-K6
Processor I/O Model
Introduction
Advances in semiconductor process technology have allowed
the performance of integrated circuits to increase dramatically.
The operating frequency of output signals driven from these
circuits continues to increase, while the switching transitions of
these signals has decreased. These particular characteristics of
high-speed signals pose challenges to a system designer
responsible for the placement and routing of components on
printed circuit boards (PCBs). In particular, the propagation
delay of a signal must be considered to ensure that sufficient
setup and hold time, with adequate margin, exist at a signal’s
destination
.
In addition, as the rise and fall times of signals
decrease, the system designer must ensure the signal quality
meets the system requirements.
Ensuring that system timing and signal quality objectives are
met prior to PCB manufacturing reduces the development
expense and expedites the time-to-market of a product. This
application note describes the format and usage of the
AMD-K6
processor I/O buffer behavioral model, which allows
a system designer to perform analog simulations of processor
signals that interface with the system logic. This model adheres
to the
I/O Buffer Information Specification
(IBIS), Version 3.2
.
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