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參數(shù)資料
| 型號： | ZR36015PQC-30 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:10; Series:; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:12; Circular Contact Gender:Pin; Circular Shell Style:Cable Receptacle; Insert Arrangement:12-10 |
| 中文描述： | 光柵座轉(zhuǎn)爐 |
| 文件頁數(shù)： | 9/27頁 |
| 文件大小： | 164K |
| 代理商： | ZR36015PQC-30 |
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ZR36015
9
PRELIMINARY
SYSCLKs before the trailing edge of VEN, then the following VEN signal (active high) will be ignored, and the VEN pulse after that
will be processed.
DECIMATION
Horizontal Decimation of data by a factor of 2 is supported for the ZR36015. This allows for the reduction of the volume of data being
stored in the Strip Buffer (and sent out over the BDATA bus) by half.
The tables below shows how data is decimated for each mode.
During expansion there is no interpolation mode for the data (except as described below for mode 2).
In mode 2, the data is decimated horizontally as shown above for mode 1. But in addition, the UV data for every other line (starting
with the second line) is dropped. The figure below shows this case.
During Expansion in mode 2, the UV data for the 1st line is replicated to replace to corresponding UV data for the second line.
Note that the MCU for mode 2 will be H=2, V=2.
Sub-Buffer and Strip Buffer Interface
Figure 12 shows the Sub-Buffer Interfaces between the Pixel Data, the Coder Data, and the double buffered Strip Memory.
The Strip Memory Interface can perform a 16-bit read or write on every SYSCLK cycle. In order to keep up with the required data
throughput, the Pixel Data and Coder Data Sub-Buffers each must be able to perform a 16-bit read or write to the Strip Memory on
every other SYSCLK cycle. Therefore the Strip Memory Interface is shared between the Pixel Data, and Coder Data Sub-Buffers,
with each Sub-Buffer accessing the Strip Memory on alternate SYSCLK cycles. Figure TBD shows the timing for alternate read and
writes to the Strip Memory.
The Pixel Data Sub-Buffer performs conversion of the data between the PXDATA Bus and the Strip Memories. (The A Memory stores
the data for all the even pixels, and the B Memory stores the data for all the odd pixels; (see the section on Strip Memory Format).
Decimation
Pixel Elements
Mode 0 (4:0:0)
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Mode 1 (4:2:2)
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U0
V0
U2
V2
U4
V4
U6
V6
Mode 3 (4:1:1)
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U0/V0
U4/V4
Decimation
Pixel Elements
Mode 2
(1st line)
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U0
V0
U2
V2
U4
V4
U6
V6
Mode 2
(2nd line)
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U0
V0
U2
V2
U4
V4
U6
V6
VEN
Line
BSY (signal)
Figure 10. Relationship of BSY Terminal and BSY Flag and GO Bit
BSY (bit)
3 SYSCLKS
GO
VDelay
VWidth
Delay of Internal Processing
At least
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZR36016 | INTEGRATED COLOR SPACE / RASTER-TO-BLOCK CONVERTER |
| ZR36016PQC-30 | INTEGRATED COLOR SPACE / RASTER-TO-BLOCK CONVERTER |
| ZR36016 | JPEG Pre- and Post-Processor(JPEG 先-后處理器) |
| ZR36050 | JPEG Image Compression Processor(JPEG 圖象壓縮處理器) |
| ZR36060 | Integrated JPEG Codec(集成JPEG編解碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZR36016 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:INTEGRATED COLOR SPACE / RASTER-TO-BLOCK CONVERTER |
| ZR36016PQC | 制造商:ZORAN 功能描述: |
| ZR36016PQC-30 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:INTEGRATED COLOR SPACE / RASTER-TO-BLOCK CONVERTER |
| ZR36050 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:JPEG IMAGE COMPRESSION PROCESSOR |
| ZR36050PQC-21 | 制造商:ZORAN 功能描述: |
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