參數(shù)資料
型號: ZL50418
廠商: Zarlink Semiconductor Inc.
英文描述: Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch
中文描述: 管理16端口10/100平方米端口1個G以太網(wǎng)交換機(jī)
文件頁數(shù): 63/163頁
文件大小: 2122K
代理商: ZL50418
ZL50418
Data Sheet
63
Zarlink Semiconductor Inc.
14.3.2 ECR2Pn: Port N Control Register
I
2
C Address: 01B-035; CPU Address:0001+2xN (N = port number)
Accessed by CPU and serial interface (R/W)
Bit [4:3]
- 00 – Automatic Enable Auto Neg. - This enables hardware state machine for
auto-negotiation.
- 01 - Limited Disable auto Neg. This disables hardware for speed auto-negotiation.
Hardware Poll MII for link status.
- 10 - Link Down. Force link down (disable the port).
- 11 - Link Up. The configuration in ECR1[2:0] is used for (speed/half duplex/full duplex/flow
control) setup.
Bit [5]
Asymmetric Flow Control Enable.
- 0 – Disable asymmetric flow control
- 01 – Enable Asymmetric flow control
- When this bit is set, and flow control is on (bit [0] = 0), don’t send out a flow control frame.
But MAC receiver interprets and processes flow control frames.
Bit [7:6]
SS - Spanning tree state (802.1D spanning tree protocol)
Default is 11
.
- 00 – Blocking: Frame is dropped
- 01 - Listening: Frame is dropped
- 10 - Learning: Frame is dropped. Source MAC address is learned.
- 11 - Forwarding: Frame is forwarded. Source MAC address is learned.
7
6
5
4
3
2
1
0
Security En
QoS Sel
Reserve
DisL
Ftf
Futf
Bit [0]:
Filter untagged frame (
Default 0
)
- 0: Disable
- 1: All untagged frames from this port are discarded or follow security option
when security is enable
Bit [1]:
Filter Tag frame (
Default 0
)
- 0: Disable
- 1: All tagged frames from this port are discarded or follow security option when
security is enable
Bit [2]:
Learning Disable
(Default 0)
- 1 Learning is disabled on this port
- 0 Learning is enabled on this port
Bit [3]:
Must be ‘1’
Bit [5:4:]
QOS mode selection
(Default 00)
Determines which of the 4 sets of QoS settings is used for 10/100 ports.
Note that there are 4 sets of per-queue byte thresholds, and 4 sets of
WFQ ratios programmed. These bits select among the 4 choices for each
10/100 port. Refer to QOS Application Note.
00: select class byte limit set 0 and classes WFQ credit set 0
01: select class byte limit set 1 and classes WFQ credit set 1
10: select class byte limit set 2 and classes WFQ credit set 2
11: select class byte limit set 3 and classes WFQ credit set 3
相關(guān)PDF資料
PDF描述
ZL50418GKC Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch
ZL60101 12 x 2.7 Gbps Parallel Fiber Optic Link Transmitter and Receiver
ZL60101MJD 12 x 2.7 Gbps Parallel Fiber Optic Link Transmitter and Receiver
ZL60102 12 x 2.7 Gbps Parallel Fiber Optic Link Transmitter and Receiver
ZL60102MJD 12 x 2.7 Gbps Parallel Fiber Optic Link Transmitter and Receiver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50418GKC 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch
ZL51B 制造商:YEASHIN 制造商全稱:YEASHIN 功能描述:500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators
ZL56B 制造商:YEASHIN 制造商全稱:YEASHIN 功能描述:500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators
ZL5V1B 制造商:YEASHIN 制造商全稱:YEASHIN 功能描述:500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators
ZL5V6B 制造商:YEASHIN 制造商全稱:YEASHIN 功能描述:500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators