參數(shù)資料
型號: ZL50117
廠商: Zarlink Semiconductor Inc.
英文描述: 32, 64 and 128 Channel CESoP Processors
中文描述: 32,64和128頻道CESoP處理器
文件頁數(shù): 74/95頁
文件大?。?/td> 1157K
代理商: ZL50117
ZL50115/16/17/18/19/20
Data Sheet
74
Zarlink Semiconductor Inc.
12.4 TDM LIU Interface Timing
The TDM Interface can be used to directly drive into a Line Interface Unit (LIU). The interface can work in this mode
with E1, DS1, J2, E3 and DS3. The frame pulse is not present, just data and clock is transmitted and received.
Table 28 shows timing for DS3, which would be the most stringent requirement.
Figure 31 - TDM-LIU Structured Transmission/Reception
Parameter
Symbol
Min.
Typ.
Max.
Units
Notes
TDM_TXCLK Period
t
CTP
t
CTH
t
CTL
t
CRP
t
CRH
t
CRL
t
PD
t
S
t
H
22.353
ns
DS3 clock
TDM_TXCLK High
6.7
ns
TDM_TXCLK Low
6.7
ns
TDM_RXCLK Period
22.353
ns
DS3 clock
TDM_RXCLK High
9.0
ns
TDM_RXCLK Low
9.0
ns
TDM_TXDATA Output Delay
3
-
10
ns
TDM_RXDATA Input Setup
6
ns
TDM_RXDATA Input Hold
3
ns
Table 28 - TDM - LIU Structured Transmission/Reception
t
PD
t
H
t
S
t
CRL
t
CRP
t
CRH
t
CTL
t
CTP
t
CTH
TDM_TXCLK
TDM_TXDATA
TDM_RXCLK
TDM_RXDATA
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50117_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors
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ZL50118 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors
ZL50118GAG 制造商:Microsemi Corporation 功能描述:CH CESOP PROCESSORS 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 32CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 32CH 324PBGA