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參數(shù)資料
| 型號(hào)： | ZL50117 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 32, 64 and 128 Channel CESoP Processors |
| 中文描述： | 32，64和128頻道CESoP處理器 |
| 文件頁數(shù)： | 31/95頁 |
| 文件大?。?/td> | 1157K |
| 代理商： | ZL50117 |
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ZL50115/16/17/18/19/20
Data Sheet
31
Zarlink Semiconductor Inc.
Signal
I/O
Package Balls
Description
M_MDC
O
H1
MII management data clock. Common for all
four MII ports. It has a minimum period of
400 ns (maximum freq. 2.5 MHz), and is
independent of the TXCLK and RXCLK.
M_MDIO
ID/
OT
G1
MII management data I/O. Common for all
four MII ports at up to 2.5 MHz. It is
bi-directional between the ZL5011x and the
Ethernet station management entity. Data is
passed synchronously with respect to
M_MDC.
Table 7 - MII Management Interface Package Ball Definition
MII Port 0
Signal
I/O
Package Balls
Description
M0_LINKUP_LED
O
G3
LED drive for MAC 0 to indicate port is linked
up.
Logic 0 output = LED on
Logic 1 output = LED off
M0_ACTIVE_LED
O
D17
LED drive for MAC 0 to indicate port is
transmitting or receiving packet data.
Logic 0 output = LED on
Logic 1 output = LED off
M0_GIGABIT_LED
O
E2
LED drive for MAC 0 to indicate operation at
Gbps.
Logic 0 output = LED on
Logic 1 output = LED off
M0_REFCLK
I D
D11
GMII/TBI
- Reference Clock input at
125 MHz. Can be used to lock receive
circuitry (RX) to M0_GTXCLK rather than
recovering the RXCLK (or RBC0 and
RBC1). Useful, for example, in the absence
of valid serial data.
NOTE:
In
MII
mode this pin must be driven
with the same clock as M0_RXCLK.
M0_RXCLK
I U
C10
GMII/MII - M0_RXCLK.
Accepts the following frequencies:
25.0 MHz MII 100 Mbps
125.0 MHz GMII 1 Gbps
Table 8 - MII Port 0 Interface Package Ball Definition
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZL50118 | 32, 64 and 128 Channel CESoP Processors |
| ZL50119 | 32, 64 and 128 Channel CESoP Processors |
| ZL50120 | 32, 64 and 128 Channel CESoP Processors |
| ZL50115GAG | 32, 64 and 128 Channel CESoP Processors |
| ZL50116GAG | 32, 64 and 128 Channel CESoP Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50117_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50117GAG | 制造商:Microsemi Corporation 功能描述:4 TDM + 1 ETHERNET - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA |
| ZL50117GAG2 | 制造商:Microsemi Corporation 功能描述:PB FREE 4 TDM + 1 ETHERNET - Trays 制造商:Microsemi Corporation 功能描述:PB FREE 4TDM PLUS 1 ETHERNET 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA |
| ZL50118 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50118GAG | 制造商:Microsemi Corporation 功能描述:CH CESOP PROCESSORS 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 32CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 32CH 324PBGA |
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