參數(shù)資料
型號： ZL50015GAC
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Enhanced 1 K Digital Switch with Stratum 4E DPLL
中文描述： TELECOM, DIGITAL TIME SWITCH, PBGA256
封裝： 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MS-034, BGA-256
文件頁數(shù)： 19/122頁
文件大小： 926K
代理商： ZL50015GAC
ZL50015
Data Sheet
19
Zarlink Semiconductor Inc.
R3, P6, R5,
N5, P12,
N15, P13,
P15
11, 12,
13, 14,
55, 56,
58, 59
STOHZ 0 - 7
Serial Output Streams High Impedance Control 0 to 7
(5 V-Tolerant Slew-Rate-Limited Three-state Outputs)
These pins are used to enable (or disable) external three-state
buffers. When an output channel is in the high impedance state,
the STOHZ drives high for the duration of the corresponding output
channel. When the STio channel is active, the STOHZ drives low
for the duration of the corresponding output channel. STOHZ
outputs are available for STio0 - only.
B15
141
ODE
Output Drive Enable (5 V-Tolerant Input with Internal Pull-up)
This is the output enable control for STio0 - 15 and the
output-driven-high control for STOHZ0 - 7. When it is high, STio0 -
15 and STOHZ0 - 7 are enabled. When it is low, STio0 - 15 are
tristated and STOHZ0 - 7 are driven high.
M4, N6, R6,
P7, R7, N7,
M8, N8, P8,
R8, M9, N9,
R9, N10, P9,
R10
16, 18,
20, 22,
23, 24,
25, 26,
27, 28,
30, 32,
34, 36,
37, 38
D0 - 15
Data Bus 0 to 15 (5 V-Tolerant Slew-Rate-Limited Three-state
I/Os)
These pins form the 16-bit data bus of the microprocessor port.
N12
44
DTA_RDY
Data Transfer Acknowledgment_Ready (5 V-Tolerant
Three-state Output)
This active low output indicates that a data bus transfer is
complete for the Motorola interface. For the Intel interface, it
indicates a transfer is completed when this pin goes from low to
high. An external pull-up resistor
MUST
hold this pin at HIGH level
for the Motorola mode. An external pull-down resistor
MUST
hold
this pin at LOW level for the Intel mode.
R11
40
CS
Chip Select (5 V-Tolerant Input)
Active low input used by the Motorola or Intel microprocessor to
enable the microprocessor port access.
N11
39
R/W_WR
Read/Write_Write (5 V-Tolerant Input)
This input controls the direction of the data bus lines (D0 - 15)
during a microprocessor access. For the Motorola interface, this
pin is set high and low for the read and write access respectively.
For the Intel interface, a write access is indicated when this pin
goes low.
R12
42
DS_RD
Data Strobe_Read (5 V-Tolerant Input)
This active low input works in conjunction with CS to enable the
microprocessor port read and write operations for the Motorola
interface. A read access is indicated when it goes low for the Intel
interface.
PBGA Pin
Number
LQFP Pin
Number
Pin Name
Description
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50015GAG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays
ZL50015QCC 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256LQFP - Trays
ZL50015QCC1 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015QCG1 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:PB FREE 1K+RATE CONVERSION AND S4E DPLL 制造商:Microsemi Corporation 功能描述:PB FREE 1K+RATE CONVERSION AND S4E DPLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 1K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 1K-CH ENH 256LQFP
ZL50016 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch
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