參數(shù)資料
型號: XRT86VL38
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 38/66頁
文件大小: 425K
代理商: XRT86VL38
XRT86VL38
35
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
REV. V1.2.0
RxTSEL
D5
C6
I
-
Receive Termination Control (RxTSEL):
Upon power up, the receivers are in "High" impedance.
Switching to internal termination can be selected through
the microprocessor interface by programming the appro-
priate channel register. However, to switch control to the
hardware pin, RxTCNTL must be programmed to "1" in the
appropriate global register (0x0FE2). Once control has
been granted to the hardware pin, it must be pulled "High"
to switch to internal termination.
N
OTE
:
Internally pulled "Low" with a 50k
Ω
resistor.
TRANSMIT LINE INTERFACE
S
IGNAL
N
AME
420 P
KG
B
ALL
#
484 P
KG
B
ALL
#
T
YPE
D
ESCRIPTION
TTIP0
TTIP1
TTIP2
TTIP3
TTIP4
TTIP5
TTIP6
TTIP7
F3
G3
J3
K3
M3
P3
T3
U3
F3
H4
J3
K1
M5
N2
R4
T1
O
Transmit Positive Analog Output (TTIPn):
TTIP is the positive differential output to the line interface. This out-
put pin, along with the corresponding TRING output pin, function as
the Transmit DS1/E1 output signal drivers for the XRT86VL38
device.
The user is expected to connect this signal and the corresponding
TRING output signal to a 1:2 step up transformer for proper opera-
tion.
This output pin will be tri-stated whenever the user sets the “TxON”
input pin or register bit (0xnF02, bit 3) to “0”.
N
OTE
:
This pin should have a series line capacitor of 0.68
μ
F for DC
blocking purposes.
TRING0
TRING1
TRING2
TRING3
TRING4
TRING5
TRING6
TRING7
G4
H4
K4
L4
M4
P4
R4
U4
F1
J5
J1
L4
M3
P5
R2
U2
O
Transmit Negative Analog Output (TRINGn):
TRING is the negative differential output to the line interface. This
output pin, along with the corresponding TTIP output pin, function as
the Transmit DS1/E1 output signal drivers for the XRT86VL38
device.
The user is expected to connect this signal and the corresponding
TRING output signal to a 1:2 step up transformer for proper opera-
tion.
N
OTE
:
This output pin will be tri-stated whenever the user sets the
“TxON” input pin or register bit (0xnF02, bit 3) to “0”.
RECEIVE LINE INTERFACE
S
IGNAL
N
AME
420 P
KG
B
ALL
#
484 P
KG
B
ALL
#
T
YPE
O
UTPUT
D
RIVE
(
M
A)
D
ESCRIPTION
RxTSEL (pin)
Rx Termination
External
Internal
0
1
Note: RxTCNTL (bit) must be set to "1"
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