參數(shù)資料
型號： XRT86VL38
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 23/66頁
文件大?。?/td> 425K
代理商： XRT86VL38
XRT86VL38
20
REV. V1.2.0
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
TxCHN0_0/
TxSIG0
TxCHN1_0/
TxSIG1
TxCHN2_0/
TxSIG2
TxCHN3_0/
TxSIG3
TxCHN4_0/
TxSIG4
TxCHN5_0/
TxSIG5
TxCHN6_0/
TxSIG6
TxCHN7_0/
TxSIG7
D12
C18
F22
L22
AD21
AC15
AB10
AC5
B11
C16
C21
K19
W16
AB13
W11
W4
I/O
8
Transmit Time Slot Octet Identifier Output 0 (TxCHNn_0) /
Transmit Serial Signaling Input (TxSIGn):
The exact function of these pins depends on whether or not
the transmit framer enables the transmit fractional/signaling
interface, as described below:
If transmit fractional/signaling interface is disabled -
TxCHNn_0:
These output pins (TxCHNn_4 through TxCHNn_0) reflect the
five-bit binary value of the current time slot being processed
by the transmit serial interface. Terminal Equipment can use
the TxCHCLK to sample the five output pins of each channel
in order to identify the time slot being processed. This pin indi-
cates the Least Significant Bit (LSB) of the time slot channel
being processed.
If transmit fractional/signaling interface is enabled -
TxSIGn:
These pins can be used to input robbed-bit signaling data to
be inserted within an outbound DS1 frame or to input Channel
Associated Signaling (CAS) data within an outbound E1
frame, as described below.
T1 Mode:
Signaling data (A,B,C,D) of each channel must be
provided on bit 4,5,6,7 of each time slot on the TxSIG pin if 16-
code signaling is used. If 4-code signaling is selected, signal-
ing data (A,B) of each channel must be provided on bit 4, 5 of
each time slot on the TxSIG pin. If 2-code signaling is
selected, signaling data (A) of each channel must be provided
on bit 4 of each time slot on the TxSIG pin.
E1 Mode:
Signaling data in E1 mode can be provided on the
TxSIGn pins on a time-slot-basis as in T1 mode, or it can be
provided on time slot 16 only via the TxSIGn input pins. In the
latter case, signaling data (A,B,C,D) of channel 1 and channel
17 must be inserted on the TxSIGn pin during time slot 16 of
frame 1, signaling data (A,B,C,D) of channel 2 and channel 18
must be inserted on the TxSIGn pin during time slot 16 of
frame 2...etc. The CAS multiframe Alignments bits (0000 bits)
and the extra bits/alarm bit (xyxx) must be inserted on the
TxSIGn pin during time slot 16 of frame 0.
N
OTE
:
Transmit fractional interface can be enabled by
programming to bit 4 - TxFr1544/TxFr2048 bit from
register 0xn120 to ‘1’.
N
OTE
:
These 8 pins are internally pulled “Low” for each
channel.
TRANSMIT SYSTEM SIDE INTERFACE
S
IGNAL
N
AME
420 P
KG
B
ALL
#
484 P
KG
B
ALL
#
T
YPE
O
UTPUT
D
RIVE
(
M
A)
D
ESCRIPTION
相關PDF資料
PDF描述
XRT86VL38_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL3x Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL3X_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL3X Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT91L30_0611 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
相關代理商/技術參數(shù)
參數(shù)描述
XRT86VL38_07 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL38_1 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VL38_2 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL38ES 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL38ES484 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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