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參數(shù)資料
| 型號： | XRT83SL34IV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP128 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, TQFP-128 |
| 文件頁數(shù)： | 62/80頁 |
| 文件大小： | 1154K |
| 代理商： | XRT83SL34IV |
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XRT83SL34
QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
62
CLOCK SELECT REGISTER
The input clock source is used to generate all the necessary clock references internally to the LIU. The
microprocessor timing is derived from a PLL output which is chosen by programming the Clock Select Bits and
the Master Clock Rate in register 0x41h. Therefore, if the clock selection bits or the MCLRATE bit are being
programmed, the frequency of the PLL output will be adjusted accordingly.
During this adjustment, it is
important to "Not" write to any other bit location within the same register while selecting the input/output clock
frequency. For best results, when bits D[6:3] are being changed, the other bits D[7] and D[2:0] as shown in
Figure 23. should retain their previous values.
FIGURE 23. REGISTER 0X81H SUB REGISTERS
Programming Examples:
Example 1: Changing bits D[6:3]
If bits D[6:3] are the only values within the register that will change in a WRITE process, the microprocessor
only needs to initiate ONE write operation.
Example 2: Changing bits D[7] and D[2:0]
If bits D[7] and D[2:0] are the only values within the register that will change in a WRITE process, the
microprocessor only needs to initiate ONE write operation.
Example 3: Changing bits within D[6:3] and the other bits
In this scenario, one must initiate TWO write operations such that bits D[6:3] and the other bits do not change
within ONE write cycle. It is recommended that bits D[6:0] and the other bits be treated as two independent
sub-registers. One can either change the clock selection bits and then change bits D[7] and D[2:0] on the
SECOND write, or vice-versa. No order or sequence is necessary.
D0
D1
D2
D3
D4
D5
D6
D7
Clock Selection Bits
ExLOS, ICT
E1arben
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT83SL34 | QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XS2F-A422-90-A | 4 CONTACT(S), POLYBUTYLENE TEREPHTHALATE, FEMALE, CIRCULAR CONNECTOR, CLAMP, SOCKET |
| XS2F-A422-A90-A | 4 CONTACT(S), POLYBUTYLENE TEREPHTHALATE, FEMALE, CIRCULAR CONNECTOR, CLAMP, SOCKET |
| XS2F-A422-AB0-A | 4 CONTACT(S), POLYBUTYLENE TEREPHTHALATE, FEMALE, CIRCULAR CONNECTOR, CLAMP, SOCKET |
| XS2F-A422-AC0-A | 4 CONTACT(S), POLYBUTYLENE TEREPHTHALATE, FEMALE, CIRCULAR CONNECTOR, CLAMP, SOCKET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83SL34IV-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT83SL38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83SL38_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER |
| XRT83SL38ES | 功能描述:外圍驅(qū)動器與原件 - PCI 8 CHT1/E1LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83SL38ES-BG | 功能描述:界面開發(fā)工具 Eval System for XRT83SL38 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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