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DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
73
NOTE: For a more detailed discussion on the LAPD
Receiver's handling of the FCS bytes, please see Section
5.3.3.
Bit 1 - EndOfMessage
The LAPD Receiver will assert this read-only bit-field,
when it has received a complete LAPD Message
frame. This bit-field, along with the Receipt of New
LAPD Message frame interrupt, serves to inform the
local P that the Receive LAPD Message buffer con-
tains a new PMDL message that needs to be read
and processed.
This bit-field is cleared (to "0") upon reading this reg-
ister.
Bit 0 - Flag Present
The LAPD Receiver will assert this read-only bit-field
when it is currently detecting the Flag Sequence octet
(7Eh) in the incoming LAPD channel (e.g., either the
GC or the NR byte-field, within each E3 frame). The
LAPD Receiver will negate this bit-field when it is no
longer receiving the Flag Sequence octet in the in-
coming LAPD channel.
2.3.3.9
Receive E3 NR Byte Register (E3, ITU-T
G.832)
This Read-Only register contains the value of the NR
byte, within the most recently received E3 frame.
Please see Section 5.3.3 for a more detailed discus-
sion on this register.
2.3.3.10 Receive E3 GC Byte Register (E3, ITU-
T G.832)
This Read-Only register contains the value of the GC
byte, residing in the most recently received E3 frame.
Please see Section 5.3.3 for a more detailed discus-
sion on this register.
2.3.3.11 Receive E3 TTB-0 Register (E3, ITU-T
G.832)
This Read-Only register contains the frame start
marker byte of the 16 byte Trail Trace Buffer Message
that has been received from the Far-End Terminal, via
the TR byte-field within the incoming E3 frames. The
remaining bytes, of this Trail Trace Buffer Message
can be found in the RxTTB-1 through RxTTB-15 reg-
isters.
The data in this register is typically of the form [1, C6,
C5, C4, C3, C2, C1, C0]. The "1" in the MSB position
identifies this byte as being the frame start marker
RXE3 NR BYTE REGISTER (ADDRESS = 0X1A)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
RxNR[7:0]
RO
0
0000
000
RXE3 GC BYTE REGISTER (ADDRESS = 0X1B)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
RxGC[7:0]
RO
0
0000
000
RXE3 TTB-0 REGISTER (ADDRESS = 0X1C)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
RxTTB-0
RO
0
0000
000