
XRT7250
DS3/E3 FRAMER IC
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REV. 1.1.1
110
This Read-Only register, along with the Frame CP-Bit
Error - One-Second Accumulator Register - MSB (Ad-
dress = 0x72) contains a 16-bit representation of the
number of CP Bit Errors tjhat have been detected by
the Receive DS3/E3 Framer block, within the last
one-second sampling period. This register contains
the LSB (or Lower Byte) value of this 16-bit expres-
sion.
2.3.8.19 Line Interface Drive Register
Bit 5 - REQB - (Receive Equalization Bypass Con-
trol)
This Read/Write bit-field allows the user to control the
state of the REQB output pin of the UNI device. This
output pin is intended to be connected to EITHER OF
the REQB input pins of the XRT7300 DS3/E3 LIU IC.
If the user forces this signal to toggle "High", then the
Receive Equalizer (within the XRT7300 device) will
be disabled. Conversely, if the user forces this signal
to toggle "Low", then the Receive Equalizer (within
the XRT7300 device) will be enabled.
Writing a "1" to this bit-field causes the Framer device
to toggle the REQB output pin "High". Writing a "0" to
this bit-field causes the Framer device to toggle the
REQB output pin "Low".
For information on the criteria that should be used
when deciding whether to bypass the equalization cir-
cuitry or not, please consult the XRT7300 DS3/E3/
STS-1 LIU IC data sheet.
NOTE: If the customer is not using the XRT7300 DS3/E3/
STS-1 LIU IC, then this bit-field and the REQB output pin
can be used for other purposes.
Bit 4 - TAOS - (Transmit All Ones Signal)
This Read/Write bit-field allows the user to control the
state of the TAOS output pin of the UNI device. This
output pin is intended to be connected to the TAOS
input pin of the XRT7300 DS3/E3/STS-1 LIU IC. If
the user forces this signal to toggle "High", then the
XRT7300 LIU device will transmit an "All Ones" pat-
tern onto the line. Conversely, if the user commands
this output signal to toggle "Low" then the XRT7300
LIU IC will proceed to transmit data based upon the
pattern that it receives via the TxPOS and TxNEG
output pins (of the Framer IC).
Writing a "1" to this bit-field will cause the TAOS out-
put pin to toggle "High". Writing a "0" to this bit-field
will cause this output pin to toggle "Low".
NOTE: If the customer is not using the XRT7300 DS3/E3/
STS-1 LIU IC, then this bit-field, and the TAOS output pin
can be used for other purposes.
Bit 3 - Encodis - (B3ZS Encoder Disable)
This Read/Write bit-field allows the user to control the
state of the Encodis output pin of the UNI device.
This output pin is intended to be connected to the En-
codis input pin of the XRT7300 DS3/E3/STS-1 LIU
IC. If the user forces this signal to toggle "High", then
the internal B3ZS/HDB3 encoder (within the
XRT7300 device) will be disabled. Conversely, if the
user command this output signal to toggle "Low",
then the internal B3ZS/HDB3 encoder (within the
XRT7300 device) will be enabled.
Writing a "1" to this bit-field causes the Framer IC to
toggle the Encodis output pin "High". Writing a "0" to
this bit-field will cause the Framer IC to toggle this
output pin "Low".
NOTES:
1. The B3ZS/HDB3 encoder, within the XRT7300
device, is not to be confused with the B3ZS/HDB3
encoding capable that exists within the Transmit
Section of the Framer IC.
2. The user is advised to disabled the B3ZS/HDB3
encoder (within the XRT7300 IC) if the XRT7250 is
configured to operate in the B3ZS/HDB3 line code.
3. If the customer is not using the XRT7300 DS3/E3/
STS-1 LIU IC, then this bit-field and the Encodis
output pin can be used for other purposes.
4. It is permissible to tie the Encodis output pin of the
XRT7250 Framer IC to both the Encodis and Deco-
dis input pins of the XRT7300 device.
Bit 2 - TxLev - (Transmit Output Line Build-Out
Select Output)
This Read/Write bit-field allows the user to control the
state of the TxLev output pin of the Framer device.
This output pin is intended to be connected to the Tx-
Lev input pin of the XRT7300 DS3/E3/STS-1 LIU IC.
If the user commands this signal to toggle High, then
the XRT7300 DS3/E3/STS-1 LIU IC will disable the
LINE INTERFACE DRIVE REGISTER (ADDRESS = 0X80)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
REQB
TAOS
ENCODIS
TxLEV
RLOOP
LLOOP
R/W
00
001
000